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Message-ID: <CAA8EJpr7tHXZHcH1Sbcy0-MCZfMxKBjaPXGdpg3cqyyFjTZOeA@mail.gmail.com>
Date: Mon, 5 Feb 2024 16:23:06 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jingyi Wang <quic_jingyw@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
robh@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
kernel@...cinc.com, Tingwei Zhang <quic_tingweiz@...cinc.com>
Subject: Re: [RFC PATCH 5/6] arm64: dts: qcom: add base AIM500 dtsi
On Mon, 5 Feb 2024 at 14:00, Jingyi Wang <quic_jingyw@...cinc.com> wrote:
>
> Introduce aim500 board dtsi.
So, is it a board or a module?
>
> AIM500 Series is a highly optimized family of modules designed to
> support AIoT and Generative AI applications based on sm8650p with
> PMIC and bluetooth functions etc.
>
> Co-developed-by: Tingwei Zhang <quic_tingweiz@...cinc.com>
> Signed-off-by: Tingwei Zhang <quic_tingweiz@...cinc.com>
> Signed-off-by: Jingyi Wang <quic_jingyw@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi | 409 +++++++++++++++++++
> 1 file changed, 409 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi b/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi
> new file mode 100644
> index 000000000000..cb857da8653b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8650p-aim500.dtsi
> @@ -0,0 +1,409 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "sm8650p.dtsi"
> +#include "pm8550.dtsi"
> +#include "pm8550b.dtsi"
> +#define PMK8550VE_SID 8
> +#include "pm8550ve.dtsi"
> +#include "pm8550vs.dtsi"
> +#include "pmk8550.dtsi"
> +
> +/ {
> + aliases {
> + serial1 = &uart14;
> + };
> +
> + vph_pwr: vph-pwr-regulator { };
Is this regulator a part of the module or a part of the carrier board?
If the latter is true, this must go to the carrier board DT file.
> +};
> +
> +&apps_rsc {
> + regulators-0 {
> + compatible = "qcom,pm8550-rpmh-regulators";
> +
> + vdd-bob1-supply = <&vph_pwr>;
> + vdd-bob2-supply = <&vph_pwr>;
> + vdd-l2-l13-l14-supply = <&vreg_bob1>;
> + vdd-l3-supply = <&vreg_s1c_1p2>;
> + vdd-l5-l16-supply = <&vreg_bob1>;
> + vdd-l6-l7-supply = <&vreg_bob1>;
> + vdd-l8-l9-supply = <&vreg_bob1>;
> + vdd-l11-supply = <&vreg_s1c_1p2>;
> + vdd-l12-supply = <&vreg_s6c_1p8>;
> + vdd-l15-supply = <&vreg_s6c_1p8>;
> + vdd-l17-supply = <&vreg_bob2>;
> +
> + qcom,pmic-id = "b";
[skipped]
> +
> +&qupv3_id_1 {
> + status = "okay";
> +};
No GPI node being enabled?
> +
> +&tlmm {
> + bt_default: bt-default-state {
> + bt-en-pins {
> + pins = "gpio17";
> + function = "gpio";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + sw-ctrl-pins {
> + pins = "gpio18";
> + function = "gpio";
> + bias-pull-down;
> + };
> + };
> +};
> +
> +&uart14 {
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn7850-bt";
> +
> + clocks = <&rpmhcc RPMH_RF_CLK1>;
> +
> + vddio-supply = <&vreg_l3c_1p2>;
> + vddaon-supply = <&vreg_l15b_1p8>;
> + vdddig-supply = <&vreg_s3c_0p9>;
> + vddrfa0p8-supply = <&vreg_s3c_0p9>;
> + vddrfa1p2-supply = <&vreg_s1c_1p2>;
> + vddrfa1p9-supply = <&vreg_s6c_1p8>;
> +
> + max-speed = <3200000>;
> +
> + enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;
> + swctrl-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-0 = <&bt_default>;
> + pinctrl-names = "default";
> + };
> +};
> --
> 2.25.1
>
>
--
With best wishes
Dmitry
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