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Message-ID: <20240206145721.2418893-1-msp@baylibre.com>
Date: Tue, 6 Feb 2024 15:57:18 +0100
From: Markus Schneider-Pargmann <msp@...libre.com>
To: Viresh Kumar <vireshk@...nel.org>,
Nishanth Menon <nm@...com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
"Rafael J . Wysocki" <rafael@...nel.org>
Cc: Andrew Davis <afd@...com>,
Dhruva Gole <d-gole@...com>,
linux-pm@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Markus Schneider-Pargmann <msp@...libre.com>
Subject: [PATCH 0/3] arm64: am62: Use nvmem for chip information in opp table
Hi everyone,
the OPP table on am625 currently uses a syscon node to get required
information from efuse registers. As efuse registers contain many
different information, this series adds nvmem support for the TI OPP
table and cpufreq driver. This way just the specific information can be
referenced in the devicetree without the need to use a syscon reference.
The nvmem layout is added in my previous series, links are below.
This series is based on
https://lore.kernel.org/linux-arm-kernel/20240206143711.2410135-1-msp@baylibre.com/
Which is also available on my public git:
https://gitlab.baylibre.com/msp8/linux/-/tree/topic/ti-chipid-nvmem/v6.8?ref_type=heads
This series is available on git as well:
https://gitlab.baylibre.com/msp8/linux/-/tree/topic/ti-cpufreq-nvmem/v6.8?ref_type=heads
Best,
Markus
Markus Schneider-Pargmann (3):
dt-bindings: cpufreq: Add nvmem-cells for chip information
cpufreq: ti-cpufreq: Support nvmem for chip version
arm64: dts: ti: k3-am625: Use nvmem-cells for opp
.../opp/operating-points-v2-ti-cpu.yaml | 16 ++-
arch/arm64/boot/dts/ti/k3-am625.dtsi | 2 +
drivers/cpufreq/ti-cpufreq.c | 105 +++++++++++-------
3 files changed, 83 insertions(+), 40 deletions(-)
--
2.43.0
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