[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZcKtqs2Usj99FRPE@x1-carbon>
Date: Tue, 6 Feb 2024 23:07:38 +0100
From: Niklas Cassel <cassel@...nel.org>
To: Jian-Hong Pan <jhp@...lessos.org>,
Dan Williams <dan.j.williams@...el.com>
Cc: Daniel Drake <drake@...lessos.org>,
Vitalii Solomonov <solomonov.v@...il.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
David Box <david.e.box@...ux.intel.com>,
Damien Le Moal <dlemoal@...nel.org>,
Nirmal Patel <nirmal.patel@...ux.intel.com>,
Jonathan Derrick <jonathan.derrick@...ux.dev>,
linux-ide@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux@...lessos.org
Subject: Re: [PATCH 1/2] ata: ahci: Add force LPM policy quirk for ASUS
B1400CEAE
On Tue, Feb 06, 2024 at 02:12:17PM +0100, Niklas Cassel wrote:
> On Tue, Feb 06, 2024 at 04:39:02PM +0800, Jian-Hong Pan wrote:
> > Niklas Cassel <cassel@...nel.org> 於 2024年2月5日 週一 下午7:33寫道:
(snip)
>
> It seems that at least Intel AHCI controllers that also have Intel VMD
> enabled break when this quirk is applied.
>
> I guess one way would be to do a:
> git show c312ef176399:drivers/ata/ahci.c | grep "PCI_VDEVICE(INTEL"
> and replace everything that is not: board_ahci_pcs7
> with a board_ahci_pcs_quirk, board_ahci_low_power_pcs_quirk, and
> board_ahci_avn_pcs_quirk, and after that change all board_ahci_pcs7
> entries to board_ahci, and assume that entries added since c312ef176399
> do not need the quirk.
>
> But it would be nice if someone from Intel could clean this up.
While it would still be nice if someone cleaned up the intel_pcs_quirk.
Jian-Hong, perhaps you can try my series:
https://lore.kernel.org/linux-ide/20240206211352.1664816-1-cassel@kernel.org/
Also available here:
https://github.com/floatious/linux/tree/external-port-v2
With that series, you should not need an explicit "board_ahci_low_power"
entry for Tiger Lake to get working LPM.
If fact, you want to ensure that you do not have any Tiger Lake entry in
ahci_pci_tbl, as that will apply intel_pcs_quirk and break your platform.
Testing is appreciated :)
Let's hope that LPM is enabled and that you can also enter low-power
C-states.
Kind regards,
Niklas
Powered by blists - more mailing lists