linux-kernel - Re: [PATCH v2] dt-bindings: firmware: xilinx: Describe soc-nvmem subnode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <7d2a1c77-16db-4ab6-9dcc-146a600ac8d4@amd.com>
Date: Tue, 6 Feb 2024 08:04:18 +0100
From: Michal Simek <michal.simek@....com>
To: linux-kernel@...r.kernel.org, monstr@...str.eu, michal.simek@...inx.com,
 git@...inx.com
Cc: Conor Dooley <conor+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Rob Herring <robh+dt@...nel.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>, kishore Manne <nava.kishore.manne@....com>,
 "moderated list:ARM/ZYNQ ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2] dt-bindings: firmware: xilinx: Describe soc-nvmem
 subnode



On 1/31/24 10:17, Michal Simek wrote:
> Describe soc-nvmem subnode as the part of firmware node. The name can't be
> pure nvmem because dt-schema already defines it as array property that's
> why different name should be used.
> 
> Signed-off-by: Michal Simek <michal.simek@....com>
> ---
> 
> Changes in v2:
> - Fix typo in subject
> - Make example bigger requested by Conor
> 
> Dt binding for nvmem node has been already merged and it is the part of
> linux-next tree.
> Here is the reference to it just in case:
> https://lore.kernel.org/r/170635581622.41421.8980881999042944764.b4-ty@linaro.org
> 
> v1 available here:
> https://lore.kernel.org/r/3869498c995cbb123127122f429e90de0a3f4014.1706531104.git.michal.simek@amd.com
> 
> ---
>   .../firmware/xilinx/xlnx,zynqmp-firmware.yaml  | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> index 870b94813a43..741f17c830f4 100644
> --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> @@ -62,6 +62,12 @@ properties:
>         interface.
>       type: object
>   
> +  soc-nvmem:
> +    $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
> +    description: The ZynqMP MPSoC provides access to the hardware related data
> +      like SOC revision, IDCODE and specific purpose efuses.
> +    type: object
> +
>     pcap:
>       $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#
>       description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
> @@ -110,6 +116,18 @@ examples:
>       firmware {
>         zynqmp_firmware: zynqmp-firmware {
>           #power-domain-cells = <1>;
> +        soc-nvmem {
> +          compatible = "xlnx,zynqmp-nvmem-fw";
> +          nvmem-layout {
> +            compatible = "fixed-layout";
> +            #address-cells = <1>;
> +            #size-cells = <1>;
> +
> +            soc_revision: soc-revision@0 {
> +                reg = <0x0 0x4>;
> +            };
> +          };
> +        };
>           gpio {
>             compatible = "xlnx,zynqmp-gpio-modepin";
>             gpio-controller;

Applied.
M