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Message-ID: <CAHCN7xJZ5m1kZwx_9whx7Bv3B4N8mhB1feZUO4PpcosBXe5R2g@mail.gmail.com>
Date: Mon, 5 Feb 2024 20:25:08 -0600
From: Adam Ford <aford173@...il.com>
To: Alexander Stein <alexander.stein@...tq-group.com>
Cc: linux-arm-kernel@...ts.infradead.org, marex@...x.de, 
	frieder.schrempf@...tron.de, Lucas Stach <l.stach@...gutronix.de>, 
	Andrzej Hajda <andrzej.hajda@...el.com>, Neil Armstrong <neil.armstrong@...aro.org>, 
	Robert Foss <rfoss@...nel.org>, Laurent Pinchart <Laurent.pinchart@...asonboard.com>, 
	Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, 
	David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, 
	Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, 
	NXP Linux Team <linux-imx@....com>, Philipp Zabel <p.zabel@...gutronix.de>, 
	Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>, 
	Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Liu Ying <victor.liu@....com>, 
	Ulf Hansson <ulf.hansson@...aro.org>, dri-devel@...ts.freedesktop.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-phy@...ts.infradead.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH V8 05/12] arm64: dts: imx8mp: add HDMI power-domains

On Mon, Feb 5, 2024 at 1:26 AM Alexander Stein
<alexander.stein@...tq-group.com> wrote:
>
> Hi Adam,
>
> thanks for working on this.
>
> Am Samstag, 3. Februar 2024, 17:52:45 CET schrieb Adam Ford:
> > From: Lucas Stach <l.stach@...gutronix.de>
> >
> > This adds the PGC and HDMI blk-ctrl nodes providing power control for
> > HDMI subsystem peripherals.
> >
> > Signed-off-by: Adam Ford <aford173@...il.com>
> > Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
> > ---
> > V2:  Add missing power-domains hdcp and hrv
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++++++++++++++++++++++
> >  1 file changed, 38 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> > 76c73daf546b..5c54073de615 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -836,6 +836,23 @@ pgc_mediamix: power-domain@10 {
> >                                                        <&clk
> IMX8MP_CLK_MEDIA_APB_ROOT>;
> >                                       };
> >
> > +                                     pgc_hdmimix: power-
> domains@14 {
>

Alexander,

Thanks for the feedback.

> As per Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml the node
> should be called power-domain@.
>
> > +                                             #power-domain-
> cells = <0>;
> > +                                             reg =
> <IMX8MP_POWER_DOMAIN_HDMIMIX>;
> > +                                             clocks = <&clk
> IMX8MP_CLK_HDMI_ROOT>,
> > +                                                      <&clk
> IMX8MP_CLK_HDMI_APB>;
> > +                                             assigned-clocks =
> <&clk IMX8MP_CLK_HDMI_AXI>,
> > +
>   <&clk IMX8MP_CLK_HDMI_APB>;
> > +                                             assigned-clock-
> parents = <&clk IMX8MP_SYS_PLL2_500M>,
> > +
>          <&clk IMX8MP_SYS_PLL1_133M>;
> > +                                             assigned-clock-
> rates = <500000000>, <133000000>;
> > +                                     };
> > +
> > +                                     pgc_hdmi_phy: power-
> domains@15 {
>
> As per Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml the node
> should be called power-domain@.

Whoops.  I totally missed these when I applied them.  I'll have them
fixed on the next spin.
>
> > +                                             #power-domain-
> cells = <0>;
> > +                                             reg =
> <IMX8MP_POWER_DOMAIN_HDMI_PHY>;
> > +                                     };
> > +
> >                                       pgc_mipi_phy2: power-
> domain@16 {
> >                                               #power-domain-
> cells = <0>;
> >                                               reg =
> <IMX8MP_POWER_DOMAIN_MIPI_PHY2>;
> > @@ -1361,6 +1378,27 @@ eqos: ethernet@...f0000 {
> >                               intf_mode = <&gpr 0x4>;
> >                               status = "disabled";
> >                       };
> > +
> > +                     hdmi_blk_ctrl: blk-ctrl@...c0000 {
> > +                             compatible = "fsl,imx8mp-hdmi-blk-
> ctrl", "syscon";
> > +                             reg = <0x32fc0000 0x23c>;
> > +                             clocks = <&clk IMX8MP_CLK_HDMI_APB>,
> > +                                      <&clk
> IMX8MP_CLK_HDMI_ROOT>,
> > +                                      <&clk
> IMX8MP_CLK_HDMI_REF_266M>,
> > +                                      <&clk IMX8MP_CLK_HDMI_24M>,
> > +                                      <&clk
> IMX8MP_CLK_HDMI_FDCC_TST>;
> > +                             clock-names = "apb", "axi",
> "ref_266m", "ref_24m", "fdcc";
> > +                             power-domains = <&pgc_hdmimix>,
> <&pgc_hdmimix>,
> > +                                             <&pgc_hdmimix>,
> <&pgc_hdmimix>,
> > +                                             <&pgc_hdmimix>,
> <&pgc_hdmimix>,
> > +                                             <&pgc_hdmimix>,
> <&pgc_hdmi_phy>,
> > +                                             <&pgc_hdmimix>,
> <&pgc_hdmimix>;
> > +                             power-domain-names = "bus",
> "irqsteer", "lcdif",
> > +                                                  "pai", "pvi",
> "trng",
> > +                                                  "hdmi-tx",
> "hdmi-tx-phy",
> > +                                                  "hdcp",
> "hrv";
> > +                             #power-domain-cells = <1>;
> > +                     };
> >               };
> >
>
> According to RM this block is part of AIPS4, so it should be below
> hsio_blk_ctrl.

This is how it was when I got it, but I should have caught it.  Thanks
for that.  It looks like the subsequent HDMI, IRQ_steerting, LCDIF and
PHY ones are also out of place.

adam
>
> Best regards,
> Alexander
>
> >               aips5: bus@...00000 {
>
>
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