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Message-ID: <CAPLW+4nyYxeZcvmrK8FJ4cvpxOs4=mPzBC5JcCPB5yNBNqkVAg@mail.gmail.com>
Date: Wed, 7 Feb 2024 09:44:27 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: broonie@...nel.org, andi.shyti@...nel.org, krzysztof.kozlowski@...aro.org,
alim.akhtar@...sung.com, linux-spi@...r.kernel.org,
linux-samsung-soc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, andre.draszik@...aro.org,
peter.griffin@...aro.org, kernel-team@...roid.com, willmcvicker@...gle.com,
robh+dt@...nel.org, conor+dt@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/4] spi: s3c64xx: prepare for a different flavor of
iowrite rep
On Wed, Feb 7, 2024 at 5:15 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
>
> There are SoCs (gs101) that allow only 32 bit register accesses. As the
> requirement is rare enough, for those SoCs we'll open code in the driver
> some s3c64xx_iowrite{8,16}_32_rep() accessors. Prepare for such addition.
>
> Suggested-by: Sam Protsenko <semen.protsenko@...aro.org>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
> drivers/spi/spi-s3c64xx.c | 35 +++++++++++++++++++++--------------
> 1 file changed, 21 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index 7f7eb8f742e4..eb79c6e4f509 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -414,6 +414,26 @@ static bool s3c64xx_spi_can_dma(struct spi_controller *host,
>
> }
>
> +static void s3c64xx_iowrite_rep(const struct s3c64xx_spi_driver_data *sdd,
> + struct spi_transfer *xfer)
> +{
> + void __iomem *addr = sdd->regs + S3C64XX_SPI_TX_DATA;
> + const void *buf = xfer->tx_buf;
> + unsigned int len = xfer->len;
> +
> + switch (sdd->cur_bpw) {
> + case 32:
> + iowrite32_rep(addr, buf, len / 4);
> + break;
> + case 16:
> + iowrite16_rep(addr, buf, len / 2);
> + break;
> + default:
> + iowrite8_rep(addr, buf, len);
> + break;
> + }
> +}
> +
> static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
> struct spi_transfer *xfer, int dma_mode)
> {
> @@ -447,20 +467,7 @@ static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
> modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
> ret = prepare_dma(&sdd->tx_dma, &xfer->tx_sg);
> } else {
> - switch (sdd->cur_bpw) {
> - case 32:
> - iowrite32_rep(regs + S3C64XX_SPI_TX_DATA,
> - xfer->tx_buf, xfer->len / 4);
> - break;
> - case 16:
> - iowrite16_rep(regs + S3C64XX_SPI_TX_DATA,
> - xfer->tx_buf, xfer->len / 2);
> - break;
> - default:
> - iowrite8_rep(regs + S3C64XX_SPI_TX_DATA,
> - xfer->tx_buf, xfer->len);
> - break;
> - }
> + s3c64xx_iowrite_rep(sdd, xfer);
> }
> }
>
> --
> 2.43.0.687.g38aa6559b0-goog
>
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