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Message-ID: <CAMknhBGauvnrNipcAoVrM5xnTHWoHyYuzDxmz=AY9_QHigwsAQ@mail.gmail.com>
Date: Thu, 8 Feb 2024 15:02:02 -0600
From: David Lechner <dlechner@...libre.com>
To: Alisa-Dariana Roman <alisadariana@...il.com>
Cc: alexandru.tachici@...log.com, alisa.roman@...log.com, conor+dt@...nel.org,
devicetree@...r.kernel.org, jic23@...nel.org,
krzysztof.kozlowski+dt@...aro.org, krzysztof.kozlowski@...aro.org,
lars@...afoo.de, linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org,
michael.hennerich@...log.com, robh+dt@...nel.org
Subject: Re: [PATCH v3 4/5] dt-bindings: iio: adc: ad7192: Add AD7194 support
On Thu, Feb 8, 2024 at 11:25 AM Alisa-Dariana Roman
<alisadariana@...il.com> wrote:
>
> Unlike the other AD719Xs, AD7194 has configurable differential
> channels. The default configuration for these channels can be changed
> from the devicetree.
>
> Also add an example for AD7194 devicetree.
>
> Signed-off-by: Alisa-Dariana Roman <alisa.roman@...log.com>
> ---
> .../bindings/iio/adc/adi,ad7192.yaml | 75 +++++++++++++++++++
> 1 file changed, 75 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> index 16def2985ab4..169bdd1dd0e1 100644
> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> @@ -21,8 +21,15 @@ properties:
> - adi,ad7190
> - adi,ad7192
> - adi,ad7193
> + - adi,ad7194
> - adi,ad7195
>
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> reg:
> maxItems: 1
>
> @@ -96,8 +103,44 @@ required:
> - spi-cpol
> - spi-cpha
>
> +patternProperties:
> + "^channel@([0-7a-f])$":
> + type: object
> + $ref: adc.yaml
> + unevaluatedProperties: false
> +
> + properties:
> + reg:
> + description: The channel index.
> + minimum: 0
> + maximum: 7
Should the max be 16 since in pseudo-differential mode there can be up
to 16 inputs?
> +
> + diff-channels:
> + description: |
> + The differential channel pair for Ad7194 configurable channels The
all caps: AD7194
> + first channel is the positive input, the second channel is the
> + negative input.
> + items:
> + minimum: 1
> + maximum: 16
As someone who would need to write a .dts based on these bindings, the
information I would find helpful in the description here is that this
is specifying how the logical channels are mapped to the 16 possible
input pins. It seems safe to assume that the values 1 to 16 correspond
to the pins AIN1 to AIN16, but it would be nice to say this
explicitly. And what do we do when using pseudo-differential inputs
where AINCOM is used as the negative input? Use 0?
> +
> + required:
> + - reg
> + - diff-channels
> +
> allOf:
> - $ref: /schemas/spi/spi-peripheral-props.yaml#
> + - if:
> + properties:
> + compatible:
> + enum:
> + - adi,ad7190
> + - adi,ad7192
> + - adi,ad7193
> + - adi,ad7195
> + then:
> + patternProperties:
> + "^channel@([0-7a-f])$": false
>
> unevaluatedProperties: false
>
> @@ -127,3 +170,35 @@ examples:
> adi,burnout-currents-enable;
> };
> };
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "adi,ad7194";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cpol;
> + spi-cpha;
> + clocks = <&ad7192_mclk>;
> + clock-names = "mclk";
> + interrupts = <25 0x2>;
> + interrupt-parent = <&gpio>;
> + dvdd-supply = <&dvdd>;
> + avdd-supply = <&avdd>;
> + vref-supply = <&vref>;
> +
> + channel@0 {
> + reg = <0>;
> + diff-channels = <1 6>;
> + };
> +
> + channel@1 {
> + reg = <1>;
> + diff-channels = <2 5>;
> + };
> + };
> + };
> --
> 2.34.1
>
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