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Message-ID: <8a7b63a8-0583-43cf-9876-8a964c8b77ee@linaro.org>
Date: Fri, 9 Feb 2024 22:14:25 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Viresh Kumar <viresh.kumar@...aro.org>
Cc: Manivannan Sadhasivam <mani@...nel.org>,
Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Bjorn Andersson <andersson@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>, Brian Masney <bmasney@...hat.com>,
Georgi Djakov <djakov@...nel.org>, linux-arm-msm@...r.kernel.org,
vireshk@...nel.org, quic_vbadigan@...cinc.com, quic_skananth@...cinc.com,
quic_nitegupt@...cinc.com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 5/6] arm64: dts: qcom: sm8450: Add opp table support to
PCIe
On 2.02.2024 08:33, Viresh Kumar wrote:
> On 01-02-24, 15:45, Konrad Dybcio wrote:
>> I'm lukewarm on this.
>>
>> A *lot* of hardware has more complex requirements than "x MBps at y MHz",
>> especially when performance counters come into the picture for dynamic
>> bw management.
>>
>> OPP tables can't really handle this properly.
>
> There was a similar concern for voltages earlier on and we added the capability
> of adjusting the voltage for OPPs in the OPP core. Maybe something similar can
> be done here ?
>
I really don't think it's fitting.. At any moment the device may require any
bandwidth value between 0 and MAX_BW_PER_LINK_GEN * LINK_WIDTH..
Konrad
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