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Message-ID: <45f8b1a6-9611-41f5-9d50-6a74fcd2382a@linaro.org>
Date: Fri, 9 Feb 2024 22:29:18 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Adam Skladowski <a39.skl@...il.com>
Cc: phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Krishna Manikandan <quic_mkrishn@...cinc.com>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/8] arm64: dts: qcom: msm8976: Add MDSS nodes
On 21.01.2024 20:41, Adam Skladowski wrote:
> Add MDSS nodes to support displays on MSM8976 SoC.
>
> Signed-off-by: Adam Skladowski <a39.skl@...il.com>
> ---
> arch/arm64/boot/dts/qcom/msm8976.dtsi | 268 +++++++++++++++++++++++++-
> 1 file changed, 264 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> index 118174cfd4d3..2d71ce34f00e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> @@ -785,10 +785,10 @@ gcc: clock-controller@...0000 {
>
> clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
> <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
> - <0>,
> - <0>,
> - <0>,
> - <0>;
> + <&mdss_dsi0_phy 1>,
> + <&mdss_dsi0_phy 0>,
> + <&mdss_dsi1_phy 1>,
> + <&mdss_dsi1_phy 0>;
> clock-names = "xo",
> "xo_a",
> "dsi0pll",
> @@ -808,6 +808,266 @@ tcsr: syscon@...7000 {
> reg = <0x01937000 0x30000>;
> };
>
> + mdss: display-subsystem@...0000 {
> + compatible = "qcom,mdss";
> +
> + reg = <0x01a00000 0x1000>,
> + <0x01ab0000 0x3000>;
> + reg-names = "mdss_phys", "vbif_phys";
> +
> + power-domains = <&gcc MDSS_GDSC>;
> + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + clocks = <&gcc GCC_MDSS_AHB_CLK>,
> + <&gcc GCC_MDSS_AXI_CLK>,
> + <&gcc GCC_MDSS_VSYNC_CLK>,
> + <&gcc GCC_MDSS_MDP_CLK>;
The last entry is misaligned
[...]
> + port@0 {
> + reg = <0>;
Please add a newline between properties and subnodes
And then the rest looks good, I think!
Konrad
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