linux-kernel - Re: [PATCH v4] i2c: i2c-qcom-geni: Correct I2C TRE sequence

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Message-ID: <CAA8EJpriONTWmdvhtuR+a3=PFs6ScO-EffCWqbt+3y9zBmwOcA@mail.gmail.com>
Date: Mon, 12 Feb 2024 15:19:48 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Viken Dadhaniya <quic_vdadhani@...cinc.com>
Cc: andersson@...nel.org, konrad.dybcio@...aro.org, andi.shyti@...nel.org, 
	linux-arm-msm@...r.kernel.org, linux-i2c@...r.kernel.org, 
	linux-kernel@...r.kernel.org, vkoul@...nel.org, quic_bjorande@...cinc.com, 
	manivannan.sadhasivam@...aro.org, bryan.odonoghue@...aro.org, 
	quic_msavaliy@...cinc.com, quic_vtanuku@...cinc.com
Subject: Re: [PATCH v4] i2c: i2c-qcom-geni: Correct I2C TRE sequence

On Mon, 12 Feb 2024 at 14:52, Viken Dadhaniya <quic_vdadhani@...cinc.com> wrote:
>
> For i2c read operation in GSI mode, we are getting timeout
> due to malformed TRE basically incorrect TRE sequence
> in gpi(drivers/dma/qcom/gpi.c) driver.
>
> I2C driver has geni_i2c_gpi(I2C_WRITE) function which generates GO TRE and
> geni_i2c_gpi(I2C_READ)generates DMA TRE. Hence to generate GO TRE before
> DMA TRE, we should move geni_i2c_gpi(I2C_WRITE) before
> geni_i2c_gpi(I2C_READ) inside the I2C GSI mode transfer function
> i.e. geni_i2c_gpi_xfer().
>
> TRE stands for Transfer Ring Element - which is basically an element with
> size of 4 words. It contains all information like slave address,
> clk divider, dma address value data size etc).
>
> Mainly we have 3 TREs(Config, GO and DMA tre).
> - CONFIG TRE : consists of internal register configuration which is
>                required before start of the transfer.
> - DMA TRE :    contains DDR/Memory address, called as DMA descriptor.
> - GO TRE :     contains Transfer directions, slave ID, Delay flags, Length
>                of the transfer.
>
> I2c driver calls GPI driver API to config each TRE depending on the
> protocol.
>
> For read operation tre sequence will be as below which is not aligned
> to hardware programming guide.
>
> - CONFIG tre
> - DMA tre
> - GO tre
>
> As per Qualcomm's internal Hardware Programming Guide, we should configure
> TREs in below sequence for any RX only transfer.
>
> - CONFIG tre
> - GO tre
> - DMA tre
>
> Fixes: d8703554f4de ("i2c: qcom-geni: Add support for GPI DMA")
> Reviewed-by: Andi Shyti <andi.shyti@...nel.org>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
> Tested-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org> # qrb5165-rb5
> Co-developed-by: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>
> Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@...cinc.com>

Thank you,

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>



-- 
With best wishes
Dmitry