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Message-ID: <20240212135108.549755-4-avromanov@salutedevices.com>
Date: Mon, 12 Feb 2024 16:50:51 +0300
From: Alexey Romanov <avromanov@...utedevices.com>
To: <neil.armstrong@...aro.org>, <clabbe@...libre.com>,
<herbert@...dor.apana.org.au>, <davem@...emloft.net>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<khilman@...libre.com>, <jbrunet@...libre.com>,
<martin.blumenstingl@...glemail.com>, <vadim.fedorenko@...ux.dev>
CC: <linux-crypto@...r.kernel.org>, <linux-amlogic@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <kernel@...utedevices.com>, Alexey
Romanov <avromanov@...utedevices.com>
Subject: [PATCH v4 03/20] drivers: crypto: meson: make CLK controller optional
Amlogic crypto IP doesn't take a clock input on some
SoCs: AXG / A1 / S4 / G12. So make it optional.
Signed-off-by: Alexey Romanov <avromanov@...utedevices.com>
---
drivers/crypto/amlogic/amlogic-gxl-core.c | 21 ++++++++-------------
drivers/crypto/amlogic/amlogic-gxl.h | 2 ++
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 4d1b1d5b7a54..54113c524ec5 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -250,6 +250,7 @@ static void meson_unregister_algs(struct meson_dev *mc)
static const struct meson_pdata meson_gxl_pdata = {
.descs_reg = 0x0,
.status_reg = 0x4,
+ .need_clk = true,
};
static const struct of_device_id meson_crypto_of_match_table[] = {
@@ -285,17 +286,14 @@ static int meson_crypto_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);
return err;
}
- mc->busclk = devm_clk_get(&pdev->dev, "blkmv");
- if (IS_ERR(mc->busclk)) {
- err = PTR_ERR(mc->busclk);
- dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err);
- return err;
- }
- err = clk_prepare_enable(mc->busclk);
- if (err != 0) {
- dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
- return err;
+ if (mc->pdata->need_clk) {
+ mc->busclk = devm_clk_get_enabled(&pdev->dev, "blkmv");
+ if (IS_ERR(mc->busclk)) {
+ err = PTR_ERR(mc->busclk);
+ dev_err(&pdev->dev, "Cannot get and enable core clock err=%d\n", err);
+ return err;
+ }
}
err = meson_allocate_chanlist(mc);
@@ -322,7 +320,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
meson_unregister_algs(mc);
error_flow:
meson_free_chanlist(mc, mc->flow_cnt - 1);
- clk_disable_unprepare(mc->busclk);
return err;
}
@@ -337,8 +334,6 @@ static void meson_crypto_remove(struct platform_device *pdev)
meson_unregister_algs(mc);
meson_free_chanlist(mc, mc->flow_cnt - 1);
-
- clk_disable_unprepare(mc->busclk);
}
static struct platform_driver meson_crypto_driver = {
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 9ad75da214ff..a36b9bac63a0 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -82,10 +82,12 @@ struct meson_flow {
* struct meson_pdata - SoC series dependent data.
* @reg_descs: offset to descriptors register
* @reg_status: offset to status register
+ * @need_clk: clock input is needed
*/
struct meson_pdata {
u32 descs_reg;
u32 status_reg;
+ bool need_clk;
};
/*
--
2.34.1
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