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Date: Tue, 13 Feb 2024 07:14:05 -0600
From: Rob Herring <robh@...nel.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: broonie@...nel.org, andi.shyti@...nel.org,
	krzysztof.kozlowski@...aro.org, semen.protsenko@...aro.org,
	conor+dt@...nel.org, alim.akhtar@...sung.com,
	linux-spi@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	andre.draszik@...aro.org, peter.griffin@...aro.org,
	kernel-team@...roid.com, willmcvicker@...gle.com,
	devicetree@...r.kernel.org, arnd@...db.de
Subject: Re: [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth
 properties

On Mon, Feb 12, 2024 at 02:03:20PM +0000, Tudor Ambarus wrote:
> There are SPI IPs that can be configured by the integrator with a
> specific FIFO depth depending on the system's capabilities. For example,
> the samsung USI SPI IP can be configured by the integrator with a TX/RX
> FIFO from 8 byte to 256 bytes.
> 
> Introduce the ``fifo-depth`` property for such instances of IPs where the
> same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth``
> and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is
> different from the TX FIFO depth.
> 
> Make the dedicated RX/TX properties dependent on each other and mutual
> exclusive with the other.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> ---
>  .../bindings/spi/spi-controller.yaml          | 27 +++++++++++++++++++
>  1 file changed, 27 insertions(+)

With the indentation fixed,

Reviewed-by: Rob Herring <robh@...nel.org>

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