lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240213-arm64-fp-init-vec-cr-v1-0-7e7c2d584f26@kernel.org>
Date: Tue, 13 Feb 2024 15:32:44 +0000
From: Mark Brown <broonie@...nel.org>
To: Catalin Marinas <catalin.marinas@....com>, 
 Will Deacon <will@...nel.org>
Cc: Dave Martin <Dave.Martin@....com>, linux-arm-kernel@...ts.infradead.org, 
 linux-kernel@...r.kernel.org, Mark Brown <broonie@...nel.org>
Subject: [PATCH 0/2] arm64/fp: Initialise all bits in vector control
 registers to known values

We currently do read/modify/write sequences whenever we update fields in
ZCR_EL1 and SMCR_EL1 so fields we are not explicitly handling will not
be initialised to known values, fix this.  The EL2 registers are already
fully configured.

Signed-off-by: Mark Brown <broonie@...nel.org>
---
Mark Brown (2):
      arm64/sve: Ensure that all fields in ZCR_EL1 are set to known values
      arm64/sme: Ensure that all fields in SMCR_EL1 are set to known values

 arch/arm64/kernel/fpsimd.c | 5 +++++
 1 file changed, 5 insertions(+)
---
base-commit: 54be6c6c5ae8e0d93a6c4641cb7528eb0b6ba478
change-id: 20240212-arm64-fp-init-vec-cr-018449327500

Best regards,
-- 
Mark Brown <broonie@...nel.org>


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ