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Message-ID: <2d4d939d-4b49-44d7-8405-e075de844884@sifive.com>
Date: Tue, 13 Feb 2024 15:31:10 -0600
From: Samuel Holland <samuel.holland@...ive.com>
To: Eric Chan <ericchancf@...gle.com>, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 3/4] riscv/barrier: Consolidate fence definitions

Hi Eric,

On 2024-02-13 2:12 PM, Eric Chan wrote:
> Disparate fence implementations are consolidated into fence.h.
> Also introduce RISCV_FENCE_ASM to make fence macro more reusable.
> 
> Signed-off-by: Eric Chan <ericchancf@...gle.com>
> ---
> v3 -> v4: fix the form that can pass the checking of checkpatch.pl.
>  arch/riscv/include/asm/atomic.h  |  8 ++------
>  arch/riscv/include/asm/barrier.h |  3 +--
>  arch/riscv/include/asm/cmpxchg.h |  1 -
>  arch/riscv/include/asm/fence.h   | 10 +++++++---
>  arch/riscv/include/asm/io.h      |  8 ++++----
>  arch/riscv/include/asm/mmio.h    |  5 +++--
>  arch/riscv/include/asm/mmiowb.h  |  2 +-
>  7 files changed, 18 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h
> index 31e6e2e7cc18..19050d13b6c1 100644
> --- a/arch/riscv/include/asm/atomic.h
> +++ b/arch/riscv/include/asm/atomic.h
> @@ -17,13 +17,9 @@
>  #endif
> 
>  #include <asm/cmpxchg.h>
> -#include <asm/barrier.h>
> 
> -#define __atomic_acquire_fence()					\
> -	__asm__ __volatile__(RISCV_ACQUIRE_BARRIER "" ::: "memory")
> -
> -#define __atomic_release_fence()					\
> -	__asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");
> +#define __atomic_acquire_fence()	RISCV_FENCE(r, rw)
> +#define __atomic_release_fence()	RISCV_FENCE(rw, r)

This change removes the omit-the-fence-on-uniprocessor optimization, like you
added some instances of in your previous patch. Should we keep this optimization?

Regards,
Samuel


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