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Message-ID: <ZcwWeiNstRNHQiI6@google.com>
Date: Tue, 13 Feb 2024 17:25:14 -0800
From: Sean Christopherson <seanjc@...gle.com>
To: Xin3 Li <xin3.li@...el.com>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>, "pbonzini@...hat.com" <pbonzini@...hat.com>,
"tglx@...utronix.de" <tglx@...utronix.de>, "mingo@...hat.com" <mingo@...hat.com>, "bp@...en8.de" <bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>,
"hpa@...or.com" <hpa@...or.com>, Weijiang Yang <weijiang.yang@...el.com>, Kai Huang <kai.huang@...el.com>
Subject: Re: [PATCH v5 1/2] KVM: VMX: Cleanup VMX basic information defines
and usages
On Wed, Feb 14, 2024, Xin3 Li wrote:
> > VMX_EPT_PAGE_WALK_4_BIT)))
> > return false;
> > break;
> > default:
> > return false;
> > }
> >
>
> I see your point here. But "#define VMX_EPTP_MT_WB 0x6ull" seems to define
> its own memory type 0x6. I think what we want is:
>
> /* in a pat/mtrr header */
> #define MEM_TYPE_WB 0x6
>
> /* vmx.h */
> #define VMX_EPTP_MT_WB MEM_TYPE_WB
>
> if it's not regarded as another layer of indirect.
Heh, yep, I already had this:
/* The EPTP memtype is encoded in bits 2:0, i.e. doesn't need to be shifted. */
#define VMX_EPTP_MT_MASK 0x7ull
#define VMX_EPTP_MT_WB X86_MEMTYPE_WB
#define VMX_EPTP_MT_UC X86_MEMTYPE_UC
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