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Date: Thu, 15 Feb 2024 16:40:10 +0100
From: Philipp Stanner <pstanner@...hat.com>
To: Thomas Richard <thomas.richard@...tlin.com>, Linus Walleij
 <linus.walleij@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>, Andy
 Shevchenko <andy@...nel.org>, Tony Lindgren <tony@...mide.com>, Haojian
 Zhuang <haojian.zhuang@...aro.org>,  Vignesh R <vigneshr@...com>, Aaro
 Koskinen <aaro.koskinen@....fi>, Janusz Krzysztofik <jmkrzyszt@...il.com>,
 Andi Shyti <andi.shyti@...nel.org>, Peter Rosin <peda@...ntia.se>, Vinod
 Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
 Philipp Zabel <p.zabel@...gutronix.de>, Lorenzo Pieralisi
 <lpieralisi@...nel.org>, Krzysztof Wilczyński
 <kw@...ux.com>,  Rob Herring <robh@...nel.org>, Bjorn Helgaas
 <bhelgaas@...gle.com>
Cc: linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org, 
 linux-i2c@...r.kernel.org, linux-phy@...ts.infradead.org, 
 linux-pci@...r.kernel.org, gregory.clement@...tlin.com,
 theo.lebrun@...tlin.com,  thomas.petazzoni@...tlin.com, u-kumar1@...com,
 Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, Andy Shevchenko
 <andy.shevchenko@...il.com>
Subject: Re: [PATCH v3 00/18] Add suspend to ram support for PCIe on J7200

On Thu, 2024-02-15 at 16:17 +0100, Thomas Richard wrote:
> This add suspend to ram support for the PCIe (RC mode) on J7200
> platform.
> 
> In RC mode, the reset pin for endpoints is managed by a gpio expander
> on a
> i2c bus. This pin shall be managed in suspend_noirq() and
> resume_noirq().
> The suspend/resume has been moved to suspend_noirq()/resume_noirq()
> for
> pca953x (expander) and pinctrl-single.
> 
> To do i2c accesses during suspend_noirq/resume_noirq, we need to
> force the
> wakeup of the i2c controller (which is autosuspended) during suspend
> callback. 
> It's the only way to wakeup the controller if it's autosuspended, as
> runtime pm is disabled in suspend_noirq and resume_noirq.
> 
> The main change in this v3 is the removal of the probe boolean for
> the
> functions wiz_clock_probe() and cdns_pcie_host_setup().
> Their contents were split in multiple functions which are called in
> the
> resume_noirq() callbacks.
> 
> Signed-off-by: Thomas Richard <thomas.richard@...tlin.com>
> ---
> Changes in v3:
> - pinctrl-single: split patch in two parts, a first patch to remove
> the
>   dead code, a second to move suspend()/resume() callbacks to noirq.
> - i2c-omap: add a comments above the suspend_noirq() callback.
> - mux: now mux_chip_resume() try to restores all muxes, then return 0
> if
>   all is ok or the first failure.
> - mmio: fix commit message.
> - phy-j721e-wiz: add a patch to use dev_err_probe() instead of
> dev_err() in
>   the wiz_clock_init() function.
> - phy-j721e-wiz: remove probe boolean for the wiz_clock_init(),
> rename the
>   function to wiz_clock_probe(), extract hardware configuration part
> in a
>   new function wiz_clock_init().
> - phy-cadence-torrent: use dev_err_probe() and fix commit messages
> - pcie-cadence-host: remove probe boolean for the
> cdns_pcie_host_setup()
>   function and extract the link setup part in a new function
>   cdns_pcie_host_link_setup().
> - pcie-cadence-host: make cdns_pcie_host_init() global.
> - pci-j721e: use the cdns_pcie_host_link_setup()
> cdns_pcie_host_init()
>   functions in the resume_noirq() callback.
> - Link to v2:
> https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v2-0-8e4f7d228ec2@bootlin.com
> 
> Changes in v2:
> - all: fix commits messages.
> - all: use DEFINE_NOIRQ_DEV_PM_OPS and pm_sleep_ptr macros.
> - all: remove useless #ifdef CONFIG_PM.
> - pinctrl-single: drop dead code
> - mux: add mux_chip_resume() function in mux core.
> - mmio: resume sequence is now a call to mux_chip_resume().
> - phy-cadence-torrent: fix typo in resume sequence
> (reset_control_assert()
>   instead of reset_control_put()).
> - phy-cadence-torrent: use PHY instead of phy.
> - pci-j721e: do not shadow cdns_pcie_host_setup return code in resume
>   sequence.
> - pci-j721e: drop dead code.
> - Link to v1:
> https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v1-0-84e55da52400@bootlin.com
> 
> ---
> Thomas Richard (15):
>       gpio: pca953x: move suspend()/resume() to
> suspend_noirq()/resume_noirq()
>       pinctrl: pinctrl-single: remove dead code in suspend() and
> resume() callbacks
>       pinctrl: pinctrl-single: move suspend()/resume() callbacks to
> noirq
>       i2c: omap: wakeup the controller during suspend() callback
>       mux: add mux_chip_resume() function
>       phy: ti: phy-j721e-wiz: use dev_err_probe() instead of
> dev_err()
>       phy: ti: phy-j721e-wiz: split wiz_clock_init() function
>       phy: ti: phy-j721e-wiz: add resume support
>       phy: cadence-torrent: extract calls to clk_get from
> cdns_torrent_clk
>       phy: cadence-torrent: register resets even if the phy is
> already configured
>       phy: cadence-torrent: add already_configured to struct
> cdns_torrent_phy
>       phy: cadence-torrent: remove noop_ops phy operations
>       phy: cadence-torrent: add suspend and resume support
>       PCI: cadence: extract link setup sequence from
> cdns_pcie_host_setup()
>       PCI: cadence: set cdns_pcie_host_init() global
> 
> Théo Lebrun (3):
>       mux: mmio: add resume support
>       PCI: j721e: add reset GPIO to struct j721e_pcie
>       PCI: j721e: add suspend and resume support


For the PCI patches Bjorn is most likely going to ask you to adjust
them to PCI's common commit style; see here [1]

In particular, PCI (afaik) has no convention for naming subcomponents
such as j721e and the info following the : is written beginning with an
upper case, e.g.

PCI: Add suspend and resume support for j721e


Regards,
P.

[1] https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/


> 
>  drivers/gpio/gpio-pca953x.c                        |   7 +-
>  drivers/i2c/busses/i2c-omap.c                      |  22 ++++
>  drivers/mux/core.c                                 |  30 +++++
>  drivers/mux/mmio.c                                 |  12 ++
>  drivers/pci/controller/cadence/pci-j721e.c         | 102
> ++++++++++++++++-
>  drivers/pci/controller/cadence/pcie-cadence-host.c |  44 +++++---
>  drivers/pci/controller/cadence/pcie-cadence.h      |  12 ++
>  drivers/phy/cadence/phy-cadence-torrent.c          | 121
> +++++++++++++++------
>  drivers/phy/ti/phy-j721e-wiz.c                     | 119
> +++++++++++++-------
>  drivers/pinctrl/pinctrl-single.c                   |  28 ++---
>  include/linux/mux/driver.h                         |   1 +
>  11 files changed, 380 insertions(+), 118 deletions(-)
> ---
> base-commit: 00ff0f9ce40db8e64fe16c424a965fd7ab769c42
> change-id: 20240102-j7200-pcie-s2r-ecb1a979e357
> 
> Best regards,


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