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Message-ID: <20240215-xdma-v1-1-1139960cf096@microchip.com>
Date: Thu, 15 Feb 2024 16:25:15 +0530
From: Durai Manickam KR <durai.manickamkr@...rochip.com>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley
<conor+dt@...nel.org>, Nicolas Ferre <nicolas.ferre@...rochip.com>,
"Alexandre Belloni" <alexandre.belloni@...tlin.com>, Claudiu Beznea
<claudiu.beznea@...on.dev>
CC: <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
"Durai Manickam KR" <durai.manickamkr@...rochip.com>
Subject: [PATCH] dt-bindings: dma: convert atmel-xdma.txt to YAML
Added a description, required properties and appropriate compatibles
for all the SoCs that are supported by microchip for the XDMAC.
Signed-off-by: Durai Manickam KR <durai.manickamkr@...rochip.com>
---
.../devicetree/bindings/dma/atmel-xdma.txt | 54 ---------------
.../bindings/dma/microchip,at91-xdma.yaml | 77 ++++++++++++++++++++++
2 files changed, 77 insertions(+), 54 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/atmel-xdma.txt b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
deleted file mode 100644
index 76d649b3a25d..000000000000
--- a/Documentation/devicetree/bindings/dma/atmel-xdma.txt
+++ /dev/null
@@ -1,54 +0,0 @@
-* Atmel Extensible Direct Memory Access Controller (XDMAC)
-
-* XDMA Controller
-Required properties:
-- compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or
- "microchip,sama7g5-dma" or
- "microchip,sam9x7-dma", "atmel,sama5d4-dma".
-- reg: Should contain DMA registers location and length.
-- interrupts: Should contain DMA interrupt.
-- #dma-cells: Must be <1>, used to represent the number of integer cells in
-the dmas property of client devices.
- - The 1st cell specifies the channel configuration register:
- - bit 13: SIF, source interface identifier, used to get the memory
- interface identifier,
- - bit 14: DIF, destination interface identifier, used to get the peripheral
- interface identifier,
- - bit 30-24: PERID, peripheral identifier.
-
-Example:
-
-dma1: dma-controller@...04000 {
- compatible = "atmel,sama5d4-dma";
- reg = <0xf0004000 0x200>;
- interrupts = <50 4 0>;
- #dma-cells = <1>;
-};
-
-
-* DMA clients
-DMA clients connected to the Atmel XDMA controller must use the format
-described in the dma.txt file, using a one-cell specifier for each channel.
-The two cells in order are:
-1. A phandle pointing to the DMA controller.
-2. Channel configuration register. Configurable fields are:
- - bit 13: SIF, source interface identifier, used to get the memory
- interface identifier,
- - bit 14: DIF, destination interface identifier, used to get the peripheral
- interface identifier,
- - bit 30-24: PERID, peripheral identifier.
-
-Example:
-
-i2c2: i2c@...24000 {
- compatible = "atmel,at91sam9x5-i2c";
- reg = <0xf8024000 0x4000>;
- interrupts = <34 4 6>;
- dmas = <&dma1
- (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
- | AT91_XDMAC_DT_PERID(6))>,
- <&dma1
- (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
- | AT91_XDMAC_DT_PERID(7))>;
- dma-names = "tx", "rx";
-};
diff --git a/Documentation/devicetree/bindings/dma/microchip,at91-xdma.yaml b/Documentation/devicetree/bindings/dma/microchip,at91-xdma.yaml
new file mode 100644
index 000000000000..0bd79c7b5e6f
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/microchip,at91-xdma.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/microchip,at91-xdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Extensible Direct Memory Access Controller (XDMAC)
+
+maintainers:
+ - Durai Manickam KR <durai.manickamkr@...rochip.com>
+
+description: |
+ The Atmel Extensible Direct Memory Access Controller (XDMAC) performs peripheral
+ data transfer and memory move operations over one or two bus ports through the
+ unidirectional communication channel. Each channel is fully programmable and
+ provides both peripheral or memory-to-memory transfers.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - atmel,sama5d4-dma
+ - microchip,sama7g5-dma
+ - microchip,sam9x7-dma
+ - items:
+ - const: atmel,sama5d4-dma
+ - const: microchip,sam9x60-dma
+ reg:
+ description: Should contain DMA registers location and length.
+ maxItems: 1
+
+ interrupts:
+ description: Should contain the DMA interrupts associated to the DMA channels.
+ maxItems: 1
+
+ "#dma-cells":
+ description: |
+ Must be <1>, used to represent the number of integer cells in the dmas
+ property of client device.
+ -The 1st cell specifies the channel configuration register:
+ -bit 13: SIF, source interface identifier, used to get the memory
+ interface identifier,
+ -bit 14: DIF, destination interface identifier, used to get the peripheral
+ interface identifier,
+ -bit 30-24: PERID, peripheral identifier.
+ const: 1
+
+ clocks:
+ description: Should contain a clock specifier for each entry in clock-names.
+ maxItems: 1
+
+ clock-names:
+ description: Should contain the clock of the DMA controller.
+ const: dma_clk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ dma0: dma-controller@...04000 {
+ compatible = "atmel,sama5d4-dma";
+ reg = <0xffffec00 0x200>;
+ interrupts = <50 4 0>;
+ #dma-cells = <1>;
+ clocks = <&pmc 2 20>;
+ clock-names = "dma_clk";
+ };
+
+...
---
base-commit: 8d3dea210042f54b952b481838c1e7dfc4ec751d
change-id: 20240215-xdma-36e8bdbf8141
Best regards,
--
Durai Manickam KR <durai.manickamkr@...rochip.com>
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