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Date: Thu, 15 Feb 2024 13:22:27 +0100
From: Jan Kiszka <jan.kiszka@...mens.com>
To: Rob Herring <robh@...nel.org>
Cc: Conor Dooley <conor+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
 devicetree <devicetree@...r.kernel.org>,
 Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
 Kishon Vijay Abraham I <kishon@...com>,
 Lorenzo Pieralisi <lorenzo.pieralisi@....com>, Nishanth Menon <nm@...com>,
 "Andrew F. Davis" <afd@...com>, Bjorn Helgaas <bhelgaas@...gle.com>,
 "Lopes Ivo, Diogo Miguel (T CED IFD-PT)" <diogo.ivo@...mens.com>
Subject: Re: [PATCH] dt-bindings: PCI: ti,am65: Fix remaining binding warnings

On 15.02.24 13:10, Rob Herring wrote:
> On Thu, Feb 15, 2024 at 09:14:47AM +0100, Jan Kiszka wrote:
>> From: Jan Kiszka <jan.kiszka@...mens.com>
>>
>> This adds the missing num-viewport, phys and phy-name properties to the
>> schema. Based on driver code, num-viewport is required for the root
>> complex, phys are optional. Their number corresponds to the number of
>> lanes. The AM65x supports up to 2 lanes.
> 
> This is DW controller, right? num-viewport shouldn't be required. The 
> number of iATU entries is determined at runtime now. If it stays, it 
> should be deprecated.
> 

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=fcde397422ef621e52dac509e253d5e8a8f43b23

You likely better understand than I what the state of all that is, but
that is how it looks like today and how the DTS are written, have to be
written.

>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
>> ---
>>  .../bindings/pci/ti,am65-pci-host.yaml        | 19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> index a20dccbafd94..cdd6834f6a6f 100644
>> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> @@ -55,6 +55,20 @@ properties:
>>  
>>    dma-coherent: true
>>  
>> +  num-viewport:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +
>> +  phys:
>> +    description: per-lane PHYs
>> +    minItems: 1
>> +    maxItems: 2
>> +
>> +  phy-names:
>> +    minItems: 1
>> +    maxItems: 2
>> +    items:
>> +      pattern: '^pcie-phy[0-9]+$'
> 
> 0-1 only
> 

Good point, fixing up, just like the example build failure.

Thanks,
Jan

>> +
>>  required:
>>    - compatible
>>    - reg
>> @@ -74,6 +88,7 @@ then:
>>      - dma-coherent
>>      - power-domains
>>      - msi-map
>> +    - num-viewport
>>  
>>  unevaluatedProperties: false
>>  
>> @@ -98,9 +113,13 @@ examples:
>>          ti,syscon-pcie-id = <&scm_conf 0x0210>;
>>          ti,syscon-pcie-mode = <&scm_conf 0x4060>;
>>          bus-range = <0x0 0xff>;
>> +        num-viewport = <16>;
>>          max-link-speed = <2>;
>>          dma-coherent;
>>          interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
>>          msi-map = <0x0 &gic_its 0x0 0x10000>;
>>          device_type = "pci";
>> +        num-lanes = <1>;
>> +        phys = <&serdes0 PHY_TYPE_PCIE 0>;
>> +        phy-names = "pcie-phy0";
>>      };
>> -- 
>> 2.35.3

-- 
Siemens AG, Technology
Linux Expert Center


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