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Message-ID: <b103244b-7776-48fb-8055-5c003d773087@sirena.org.uk>
Date: Thu, 15 Feb 2024 13:00:38 +0000
From: Mark Brown <broonie@...nel.org>
To: Anshuman Khandual <anshuman.khandual@....com>
Cc: linux-arm-kernel@...ts.infradead.org,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64/sysreg: Update ID_AA64DFR0_EL1 and ID_DFR0_EL1
On Thu, Feb 15, 2024 at 11:21:59AM +0530, Anshuman Khandual wrote:
> This just updates ID_DFR0_EL1.CopDbg and ID_AA64DFR0_EL1.DebugVer register
> fields as per the definitions based on DDI0601 2023-12.
Just as a general note for non-trival registers it's easier to review if
we change one register per patch, it avoids having to re-review the same
registers repeatedly and for incremental changes like this it helps with
the fact that diff does badly at offering context.
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -231,6 +231,7 @@ Enum 3:0 CopDbg
> 0b1000 Debugv8p2
> 0b1001 Debugv8p4
> 0b1010 Debugv8p8
> + 0b1011 Debugv8p9
> EndEnum
> EndSysreg
This is ID_AA64DFR0_EL1 and is missing at least an update to PMSVer.
>
> @@ -1247,6 +1248,7 @@ UnsignedEnum 3:0 DebugVer
> 0b1000 V8P2
> 0b1001 V8P4
> 0b1010 V8P8
> + 0b1011 V8P9
> EndEnum
> EndSysreg
This is ID_DFR0_EL1 and is missing an update to at least PerfMon.
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