lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <wged56grfp7qwvkd2gq4qbewzdevv23kz52vou2z2uh4ws7c3c@b6xigs2ca5oe>
Date: Fri, 16 Feb 2024 11:58:03 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: quic_fenglinw@...cinc.com, kernel@...cinc.com, 
	Andy Gross <agross@...nel.org>, Konrad Dybcio <konrad.dybcio@...aro.org>, 
	Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
	Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: ipq6018: add #power-domain-cells for
 gcc node

On Thu, Jan 04, 2024 at 11:53:46AM +0200, Dmitry Baryshkov wrote:
> On Thu, 4 Jan 2024 at 10:06, Fenglin Wu via B4 Relay
> <devnull+quic_fenglinw.quicinc.com@...nel.org> wrote:
> >
> > From: Fenglin Wu <quic_fenglinw@...cinc.com>
> >
> > Property '#power-domain-cells' is required as per defined in qcom,gcc.yaml
> > so add it for ipq6018 gcc device node to eliminate following warning in
> > dtbs_check:
> >
> > arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: gcc@...0000:
> >         '#power-domain-cells' is a required property
> > from schema $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
> 
> But ipq6018 doesn't implement GDSC support. So for the sake of fixing
> the warning you are adding a bogus property.
> 

The platform does indeed have two USB GDSCs, which you can see being
referred to in gcc_ipq6018_probe().

But while this patch removes a warning, I think the proper solution
would be to actually describe those GDSCs in the DeviceTree as well.
Unfortunately this would imply the need to actually implement them in
Linux as well.


Alternatively, there exist a reason for not actually change the state of
these GDSCs at runtime - i.e. the gcc driver is doing the right thing.
But if so, this patch would be wrong...

Regards,
Bjorn

> >
> > Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > index 39cd6b76b4c1..54914912d610 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> > @@ -386,6 +386,7 @@ gcc: gcc@...0000 {
> >                         reg = <0x0 0x01800000 0x0 0x80000>;
> >                         clocks = <&xo>, <&sleep_clk>;
> >                         clock-names = "xo", "sleep_clk";
> > +                       #power-domain-cells = <1>;
> >                         #clock-cells = <1>;
> >                         #reset-cells = <1>;
> >                 };
> >
> > ---
> > base-commit: 17cb8a20bde66a520a2ca7aad1063e1ce7382240
> > change-id: 20240103-gcc-docs-update-fa604579e468
> >
> > Best regards,
> > --
> > Fenglin Wu <quic_fenglinw@...cinc.com>
> >
> >
> 
> 
> -- 
> With best wishes
> Dmitry

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ