linux-kernel - Re: [PATCH v3 18/18] PCI: j721e: add suspend and resume support

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Date: Fri, 16 Feb 2024 12:09:17 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: "Siddharth Vadapalli" <s-vadapalli@...com>, "Thomas Richard"
 <thomas.richard@...tlin.com>
Cc: "Linus Walleij" <linus.walleij@...aro.org>, "Bartosz Golaszewski"
 <brgl@...ev.pl>, "Andy Shevchenko" <andy@...nel.org>, "Tony Lindgren"
 <tony@...mide.com>, "Haojian Zhuang" <haojian.zhuang@...aro.org>, "Vignesh
 R" <vigneshr@...com>, "Aaro Koskinen" <aaro.koskinen@....fi>, "Janusz
 Krzysztofik" <jmkrzyszt@...il.com>, "Andi Shyti" <andi.shyti@...nel.org>,
 "Peter Rosin" <peda@...ntia.se>, "Vinod Koul" <vkoul@...nel.org>, "Kishon
 Vijay Abraham I" <kishon@...nel.org>, "Philipp Zabel"
 <p.zabel@...gutronix.de>, "Lorenzo Pieralisi" <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kw@...ux.com>, "Rob Herring"
 <robh@...nel.org>, "Bjorn Helgaas" <bhelgaas@...gle.com>,
 <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
 <linux-arm-kernel@...ts.infradead.org>, <linux-omap@...r.kernel.org>,
 <linux-i2c@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
 <linux-pci@...r.kernel.org>, <gregory.clement@...tlin.com>,
 <thomas.petazzoni@...tlin.com>, <u-kumar1@...com>
Subject: Re: [PATCH v3 18/18] PCI: j721e: add suspend and resume support

Hello,

On Fri Feb 16, 2024 at 11:48 AM CET, Siddharth Vadapalli wrote:
> On 24/02/15 04:18PM, Thomas Richard wrote:
> > From: Théo Lebrun <theo.lebrun@...tlin.com>
> > 
> > Add suspend and resume support. Only the rc mode is supported.
> > 
> > During the suspend stage PERST# is asserted, then deasserted during the
> > resume stage.
>
> Wouldn't this imply that the Endpoint device will be reset and therefore
> lose context? Or is it expected that the driver corresponding to the
> Endpoint Function in Linux will restore the state on resume, post reset?

This does imply exactly that. Endpoint driver must be able to restore
context anyway, as system-wide suspend could mean lost power to PCI RC
controller (eg suspend-to-RAM) or PCI rails (dependent on hardware).

Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com