lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Fri, 16 Feb 2024 14:39:19 +0100
From: Paweł Owoc <frut3k7@...il.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>, Robert Marko <robimarko@...il.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	Mark Brown <broonie@...nel.org>, Guenter Roeck <linux@...ck-us.net>, 
	Peter Yin <peteryin.openbmc@...il.com>, 
	Patrick Rudolph <patrick.rudolph@...ements.com>, Michal Simek <michal.simek@....com>, 
	Marek Vasut <marex@...x.de>, Luca Ceresoli <luca.ceresoli@...tlin.com>, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Lukas Wunner <lukas@...ner.de>, Fabio Estevam <festevam@...x.de>, 
	Alexander Stein <alexander.stein@...tq-group.com>, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: trivial-devices: Add qca,qca4024

To be clear, I don't want to add support for the QCA4024, I just want
to use this SoC with its own firmware connected to another SoC
(IPQ8072A) via spi.

On Fri, Feb 16, 2024 at 8:19 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 15/02/2024 23:01, frut3k7 wrote:
> > The device I use has the QCA4024 chip connected via the spi controller:
> >         blsp1_spi4: spi@...8000 {
> >             compatible = "qcom,spi-qup-v2.2.1";
> >             #address-cells = <1>;
> >             #size-cells = <0>;
> >             reg = <0x78b8000 0x600>;
> >             interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> >             clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
> >                  <&gcc GCC_BLSP1_AHB_CLK>;
> >             clock-names = "core", "iface";
> >             dmas = <&blsp_dma 18>, <&blsp_dma 19>;
> >             dma-names = "tx", "rx";
> >             status = "disabled";
> >         };
> >
> > and apart from setting the frequency and gpio there is nothing else:
> >         &blsp1_spi4 {
> >             status = "okay";
> >
> >             pinctrl-0 = <&spi_3_pins &quartz_pins>;
> >             pinctrl-names = "default";
> >
> >             /* Qualcomm QCA4024 IoT */
> >             iot@3 {
> >                 compatible = "qca,qca4024";
> >                 reg = <0>;
> >                 spi-max-frequency = <24000000>;
>
> That's your downstream or fork DTS, not hardware description. You could
> have several regulators not listed here, because your downstream has
> always-on, or clocks which are not taken and works due to
> assigned-clocks in other places... Sorry, that's not an argument. Never
> use downstream DTS as proof how hardware looks. It is usually dis-proof,
> that things are certainly missing.
>
> Best regards,
> Krzysztof
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ