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Message-ID: <CAMuHMdUCB3GQxGPxG35rebN2yrKYBnZDzORaEEOuZb3aMgrf6g@mail.gmail.com>
Date: Fri, 16 Feb 2024 15:01:40 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org, magnus.damm@...il.com,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 01/17] dt-bindings: clock: r9a07g043-cpg: Add power domain IDs
Hi Claudiu,
On Thu, Feb 8, 2024 at 1:43 PM Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Add power domain IDs for RZ/G2UL (R9A07G043) SoC.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Thanks for your patch!
> --- a/include/dt-bindings/clock/r9a07g043-cpg.h
> +++ b/include/dt-bindings/clock/r9a07g043-cpg.h
> @@ -200,5 +200,53 @@
> #define R9A07G043_AX45MP_CORE0_RESETN 78 /* RZ/Five Only */
> #define R9A07G043_IAX45_RESETN 79 /* RZ/Five Only */
>
> +/* Power domain IDs. */
> +#define R9A07G043_PD_ALWAYS_ON 0
> +#define R9A07G043_PD_GIC 1
As this file is shared between RZ/G2UL and RZ/Five, R9A07G043_PD_GIC
needs an "/* RZ/G2UL Only */" comment
> +#define R9A07G043_PD_IA55 2
> +#define R9A07G043_PD_MHU 3
> +#define R9A07G043_PD_CORESIGHT 4
> +#define R9A07G043_PD_SYC 5
Likewise for the four above.
> +#define R9A07G043_PD_DMAC 6
> +#define R9A07G043_PD_GTM0 7
> +#define R9A07G043_PD_GTM1 8
> +#define R9A07G043_PD_GTM2 9
> +#define R9A07G043_PD_MTU 10
> +#define R9A07G043_PD_POE3 11
> +#define R9A07G043_PD_WDT0 12
> +#define R9A07G043_PD_SPI 13
> +#define R9A07G043_PD_SDHI0 14
> +#define R9A07G043_PD_SDHI1 15
> +#define R9A07G043_PD_ISU 16
> +#define R9A07G043_PD_CRU 17
> +#define R9A07G043_PD_LCDC 18
Likewise for the three above.
> +#define R9A07G043_PD_SSI0 19
> +#define R9A07G043_PD_SSI1 20
> +#define R9A07G043_PD_SSI2 21
> +#define R9A07G043_PD_SSI3 22
> +#define R9A07G043_PD_SRC 23
> +#define R9A07G043_PD_USB0 24
> +#define R9A07G043_PD_USB1 25
> +#define R9A07G043_PD_USB_PHY 26
> +#define R9A07G043_PD_ETHER0 27
> +#define R9A07G043_PD_ETHER1 28
> +#define R9A07G043_PD_I2C0 29
> +#define R9A07G043_PD_I2C1 30
> +#define R9A07G043_PD_I2C2 31
> +#define R9A07G043_PD_I2C3 32
> +#define R9A07G043_PD_SCIF0 33
> +#define R9A07G043_PD_SCIF1 34
> +#define R9A07G043_PD_SCIF2 35
> +#define R9A07G043_PD_SCIF3 36
> +#define R9A07G043_PD_SCIF4 37
> +#define R9A07G043_PD_SCI0 38
> +#define R9A07G043_PD_SCI1 39
> +#define R9A07G043_PD_IRDA 40
> +#define R9A07G043_PD_RSPI0 41
> +#define R9A07G043_PD_RSPI1 42
> +#define R9A07G043_PD_RSPI2 43
> +#define R9A07G043_PD_CANFD 44
> +#define R9A07G043_PD_ADC 45
> +#define R9A07G043_PD_TSU 46
>
> #endif /* __DT_BINDINGS_CLOCK_R9A07G043_CPG_H__ */
In addition, you need definitions for the modules that are only
present on RZ/Five, e.g.
#define R9A07G043_PD_PLIC 47 /* RZ/Five Only */
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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