linux-kernel - Re: [PATCH RFC] riscv: dts: sophgo: add sdcard support for milkv duo

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Sun, 18 Feb 2024 09:22:21 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Jisheng Zhang <jszhang@...nel.org>, Ulf Hansson <ulf.hansson@...aro.org>,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Adrian Hunter <adrian.hunter@...el.com>,
 Inochi Amaoto <inochiama@...look.com>
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH RFC] riscv: dts: sophgo: add sdcard support for milkv duo

Adding Inochia.

hi, Jisheng,

For changes under arch/riscv/boot/dts/sophgo/, please looping Inochia 
and me.

FYI: 
https://lore.kernel.org/linux-riscv/IA1PR20MB4953B158F6F575840F3D4267BB7D2@IA1PR20MB4953.namprd20.prod.outlook.com/

Thanks,

Chen

On 2024/2/17 22:48, Jisheng Zhang wrote:
> Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
> Since cv1800b's clk support isn't in, this patch uses fixed dummy clk
> and just RFC, I will send formal patch after clk support is ready.
>
>   .../riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts |  8 ++++++++
>   arch/riscv/boot/dts/sophgo/cv18xx.dtsi          | 17 +++++++++++++++++
>   2 files changed, 25 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> index 3af9e34b3bc7..94e64ddce8fa 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> @@ -33,6 +33,14 @@ &osc {
>   	clock-frequency = <25000000>;
>   };
>   
> +&sdhci0 {
> +	status = "okay";
> +	bus-width = <4>;
> +	no-1-8-v;
> +	no-mmc;
> +	no-sdio;
> +};
> +
>   &uart0 {
>   	status = "okay";
>   };
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 2d6f4a4b1e58..405f4ba18392 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -4,6 +4,7 @@
>    * Copyright (C) 2023 Inochi Amaoto <inochiama@...look.com>
>    */
>   
> +#include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   
>   / {
> @@ -45,6 +46,13 @@ osc: oscillator {
>   		#clock-cells = <0>;
>   	};
>   
> +	sdhci_clk: sdhci-clock {
> +		compatible = "fixed-clock";
> +		clock-frequency = <375000000>;
> +		clock-output-names = "sdhci_clk";
> +		#clock-cells = <0>;
> +	};
> +
>   	soc {
>   		compatible = "simple-bus";
>   		interrupt-parent = <&plic>;
> @@ -175,6 +183,15 @@ uart4: serial@...0000 {
>   			status = "disabled";
>   		};
>   
> +		sdhci0: mmc@...0000 {
> +			compatible = "sophgo,cv1800b-dwcmshc";
> +			reg = <0x4310000 0x1000>;
> +			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sdhci_clk>;
> +			clock-names = "core";
> +			status = "disabled";
> +		};
> +
>   		plic: interrupt-controller@...00000 {
>   			reg = <0x70000000 0x4000000>;
>   			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;