lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <64726f87-a909-4f85-93b5-e12c9a83e251@ti.com>
Date: Mon, 19 Feb 2024 14:15:10 +0530
From: "Kumar, Udit" <u-kumar1@...com>
To: Vaishnav Achath <vaishnav.a@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <s-vadapalli@...com>
Subject: Re: [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support

Hi Vaishnav

On 2/19/2024 1:53 PM, Vaishnav Achath wrote:
> Hi Udit,
>
> On 19/02/24 11:25, Kumar, Udit wrote:
>> Hi Vaishnav
>>
>> On 2/16/2024 7:25 PM, Vaishnav Achath wrote:
>>> J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected
>>> to the OSPI interface, add support for the flash and describe
>>> the partition information as per bootloader.
>>>
>>> Signed-off-by: Vaishnav Achath <vaishnav.a@...com>
>>> ---
>>>   arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 
>>> +++++++++++++++++++++++++
>>>   1 file changed, 79 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts 
>>> b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>>> index 9e12a6e9111f..b1c6499c0c9d 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>>> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>>> @@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) 
>>> MDIO0_MDIO */
>>>           >;
>>>       };
>>> +    ospi0_pins_default: ospi0-default-pins {
>>> +        pinctrl-single,pins = <
>>> +            J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */
>>> +            J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */
>>> +            J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */
>>> +            J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */
>>> +            J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */
>>> +            J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */
>>> +            J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */
>>> +            J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */
>>> +            J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */
>>> +            J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */
>>> +            J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */
>>
>>
>> Could you check, Pin name in comments
>>
>> For example, Schematic says L22 is for OSPI0_DQS , but comments says P22
>>
>> However offsets are good .
>
> Thanks for the review, I will fix this in the next revision.
>
>>
>>> +        >;
>>> +        bootph-all;
>>> +    };
>>> +
>>>       rgmii1_pins_default: rgmii1-default-pins {
>>>           pinctrl-single,pins = <
>>>               J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
>>> @@ -290,6 +307,68 @@ exp1: gpio@23 {
>>>       };
>>>   };
>>> +&ospi0 {
>>> +    pinctrl-names = "default";
>>> +    pinctrl-0 = <&ospi0_pins_default>;
>>> +    status = "okay";
>>> +
>>> +    flash@0 {
>>> +        compatible = "jedec,spi-nor";
>>> +        reg = <0x0>;
>>> +        spi-tx-bus-width = <8>;
>>> +        spi-rx-bus-width = <8>;
>>> +        spi-max-frequency = <25000000>;
>>> +        cdns,tshsl-ns = <60>;
>>> +        cdns,tsd2d-ns = <60>;
>>> +        cdns,tchsh-ns = <60>;
>>> +        cdns,tslch-ns = <60>;
>>> +        cdns,read-delay = <4>;
>>> +        bootph-all;
>>> +
>>> +        partitions {
>>> +            compatible = "fixed-partitions";
>>> +            #address-cells = <1>;
>>> +            #size-cells = <1>;
>>> +
>>> +            partition@0 {
>>> +                label = "ospi.tiboot3";
>>> +                reg = <0x00 0x80000>;
>>> +            };
>>
>>
>> I suggest to keep 1MB to accommodate future size increase
>>
>
> For J722S, the maximum loadable SPL size is 0x7e000, images larger 
> than these cannot be loaded by ROM, increasing the size here will not 
> give any benefit, planning to keep as-is if there are no objections.
>
If ROM is limiting size here, then no need to increase this


> Thanks and Regards,
> Vaishnav
>
>>> +
>>> +            partition@...00 {
>>> +                label = "ospi.tispl";
>>> +                reg = <0x80000 0x200000>;
>>> +            };
>>> +
>>> +            partition@...000 {
>>> +                label = "ospi.u-boot";
>>> +                reg = <0x280000 0x400000>;
>>> +            };
>>> +
>>> +            partition@...000 {
>>> +                label = "ospi.env";
>>> +                reg = <0x680000 0x40000>;
>>> +            };
>>> +
>>> +            partition@...000 {
>>> +                label = "ospi.env.backup";
>>> +                reg = <0x6c0000 0x40000>;
>>> +            };
>>> +
>>> +            partition@...000 {
>>> +                label = "ospi.rootfs";
>>> +                reg = <0x800000 0x37c0000>;
>>> +            };
>>> +
>>> +            partition@...0000 {
>>> +                label = "ospi.phypattern";
>>> +                reg = <0x3fc0000 0x40000>;
>>> +            };
>>> +        };
>>> +    };
>>> +
>>> +};
>>> +
>>>   &sdhci1 {
>>>       /* SD/MMC */
>>>       vmmc-supply = <&vdd_mmc1>;

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ