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Message-ID: <CAK9=C2UO4=H9jPXFjJhS5b9kPezVutto1aReAmH3rU_uUhf9=g@mail.gmail.com>
Date: Mon, 19 Feb 2024 15:05:27 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Frank Rowand <frowand.list@...il.com>,
Conor Dooley <conor+dt@...nel.org>, Marc Zyngier <maz@...nel.org>, Björn Töpel <bjorn@...nel.org>,
Atish Patra <atishp@...shpatra.org>, Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>, Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>, linux-riscv@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v12 22/25] irqchip: Add RISC-V advanced PLIC driver for direct-mode
On Sat, Feb 17, 2024 at 2:20 AM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> On Sat, Jan 27 2024 at 21:47, Anup Patel wrote:
> > +static int aplic_direct_irqdomain_translate(struct irq_domain *d,
> > + struct irq_fwspec *fwspec,
> > + unsigned long *hwirq,
> > + unsigned int *type)
>
> Please align the arguments to the first argument of the first line and
> use the 100 characters, i.e.
>
> static int aplic_direct_irqdomain_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
> unsigned long *hwirq, unsigned int *type)
> {
>
> All over the place.
Okay, I will update.
>
> > +{
> > + struct aplic_priv *priv = d->host_data;
> > +
> > + return aplic_irqdomain_translate(fwspec, priv->gsi_base,
> > + hwirq, type);
> > +}
> > +
> > +static int aplic_direct_irqdomain_alloc(struct irq_domain *domain,
> > + unsigned int virq, unsigned int nr_irqs,
> > + void *arg)
> > +{
> > + int i, ret;
> > + unsigned int type;
> > + irq_hw_number_t hwirq;
> > + struct irq_fwspec *fwspec = arg;
> > + struct aplic_priv *priv = domain->host_data;
> > + struct aplic_direct *direct =
> > + container_of(priv, struct aplic_direct, priv);
>
> Variable ordering. Please make this consistent according to documentation.
Okay, I will update.
>
> > + ret = aplic_irqdomain_translate(fwspec, priv->gsi_base,
> > + &hwirq, &type);
> > + if (ret)
> > + return ret;
> > +
> > + for (i = 0; i < nr_irqs; i++) {
> > + irq_domain_set_info(domain, virq + i, hwirq + i,
> > + &aplic_direct_chip, priv,
> > + handle_fasteoi_irq, NULL, NULL);
> > + irq_set_affinity(virq + i, &direct->lmask);
> > + /* See the reason described in aplic_msi_irqdomain_alloc() */
>
> I still have to understand that "reason". :)
Like mentioned on another patch, I will drop it for now. If required
then we can bring it back as a separate patch with clear reasoning.
>
> > + irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY);
> > + }
>
> Thanks,
>
> tglx
Regards,
Anup
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