lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <adf70c16-f1dc-4f01-a331-b0cd975a4c42@collabora.com>
Date: Mon, 19 Feb 2024 13:28:49 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Stephen Boyd <sboyd@...nel.org>,
 Matthias Brugger <matthias.bgg@...il.com>
Cc: linux-clk@...r.kernel.org, linux-mediatek@...ts.infradead.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: mediatek: mt8183: Correct parent of
 CLK_INFRA_SSPM_32K_SELF

Il 19/02/24 11:51, Chen-Yu Tsai ha scritto:
> CLK_INFRA_SSPM_32K_SELF has the "f_f26m_ck" clock assigned as its parent.
> This is inconsistent as the clock is part of a group that are all gates
> without dividers, and this makes the kernel think it runs at 26 MHz.
> 
> After clarification from MediaTek engineers, the correct parent is
> actually the system 32 KHz clock.
> 
> Fixes: 1eb8d61ac5c9 ("clk: mediatek: mt8183: Add back SSPM related clocks")
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ