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Message-Id: <20240219-imx-mailbox-v8-1-75535a87794e@nxp.com>
Date: Mon, 19 Feb 2024 13:22:36 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Dong Aisheng <aisheng.dong@....com>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, NXP Linux Team <linux-imx@....com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, Peng Fan <peng.fan@....com>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: [PATCH v8 1/5] dt-bindings: mailbox: fsl,mu: add i.MX95
Generic/ELE/V2X MU compatible
From: Peng Fan <peng.fan@....com>
Add i.MX95 Generic, Secure Enclave and V2X Message Unit compatible string.
And the MUs in AONMIX has internal RAMs for SCMI shared buffer usage.
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: Peng Fan <peng.fan@....com>
---
.../devicetree/bindings/mailbox/fsl,mu.yaml | 58 +++++++++++++++++++++-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 12e7a7d536a3..00631afcd51d 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -29,8 +29,11 @@ properties:
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- const: fsl,imx8-mu-seco
- - const: fsl,imx93-mu-s4
- const: fsl,imx8ulp-mu-s4
+ - const: fsl,imx93-mu-s4
+ - const: fsl,imx95-mu
+ - const: fsl,imx95-mu-ele
+ - const: fsl,imx95-mu-v2x
- items:
- const: fsl,imx93-mu
- const: fsl,imx8ulp-mu
@@ -95,6 +98,19 @@ properties:
power-domains:
maxItems: 1
+ ranges: true
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+patternProperties:
+ "^sram@[a-f0-9]+":
+ $ref: /schemas/sram/sram.yaml#
+ unevaluatedProperties: false
+
required:
- compatible
- reg
@@ -122,6 +138,15 @@ allOf:
required:
- interrupt-names
+ - if:
+ not:
+ properties:
+ compatible:
+ const: fsl,imx95-mu
+ then:
+ patternProperties:
+ "^sram@[a-f0-9]+": false
+
additionalProperties: false
examples:
@@ -134,3 +159,34 @@ examples:
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ mailbox@...b0000 {
+ compatible = "fsl,imx95-mu";
+ reg = <0x445b0000 0x10000>;
+ ranges;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #mbox-cells = <2>;
+
+ sram@...b1000 {
+ compatible = "mmio-sram";
+ reg = <0x445b1000 0x400>;
+ ranges = <0x0 0x445b1000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ scmi-sram-section@0 {
+ compatible = "arm,scmi-shmem";
+ reg = <0x0 0x80>;
+ };
+
+ scmi-sram-section@80 {
+ compatible = "arm,scmi-shmem";
+ reg = <0x80 0x80>;
+ };
+ };
+ };
--
2.37.1
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