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Message-ID: <1a11cee2-2ef1-4ce0-8cc1-63c6cc97863f@linaro.org>
Date: Tue, 20 Feb 2024 09:11:43 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Alex Soo <yuklin.soo@...rfivetech.com>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
Hal Feng <hal.feng@...rfivetech.com>,
Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
Jianlong Huang <jianlong.huang@...rfivetech.com>,
Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Drew Fustini <drew@...gleboard.org>
Cc: linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [RFC PATCH v2 1/6] dt-bindings: pinctrl: starfive: Add JH8100
pinctrl
On 20/02/2024 07:42, Alex Soo wrote:
> Add documentation and header file for JH8100 pinctrl driver.
>
> Signed-off-by: Alex Soo <yuklin.soo@...rfivetech.com>
> ---
RFC? Why isn't this patch ready for review?
As requested, I will provide only brief review, not full one.
..
> +
> +properties:
> + compatible:
> + oneOf:
Drop
> + - items:
> + - const: starfive,jh8100-aon-pinctrl
> + - const: syscon
> + - const: simple-mfd
> +
> + reg:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-controller: true
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + wakeup-gpios:
> + maxItems: 1
> + description: GPIO pin to be used for waking up the system from sleep mode.
> +
> + wakeup-source:
> + maxItems: 1
> + description: to indicate pinctrl has wakeup capability.
> +
> +patternProperties:
> + '-grp$':
> + type: object
> + additionalProperties: false
> + patternProperties:
> + '-pins$':
> + type: object
> + description: |
> + A pinctrl node should contain at least one subnode representing the
> + pinctrl groups available in the domain. Each subnode will list the
> + pins it needs, and how they should be configured, with regard to
> + muxer configuration, bias, input enable/disable, input schmitt
> + trigger enable/disable, slew-rate and drive strength.
> + allOf:
> + - $ref: /schemas/pinctrl/pincfg-node.yaml
> + - $ref: /schemas/pinctrl/pinmux-node.yaml
> + additionalProperties: false
NAK, nothing improved.
...
> diff --git a/include/dt-bindings/pinctrl/starfive,jh8100-pinctrl.h b/include/dt-bindings/pinctrl/starfive,jh8100-pinctrl.h
> new file mode 100644
> index 000000000000..055bac7eb2a6
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/starfive,jh8100-pinctrl.h
> @@ -0,0 +1,103 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR MIT */
> +/*
> + * Copyright (C) 2023-2024 StarFive Technology Co., Ltd.
> + */
> +
> +#ifndef __DT_BINDINGS_PINCTRL_STARFIVE_JH8100_H__
> +#define __DT_BINDINGS_PINCTRL_STARFIVE_JH8100_H__
> +
> +/* sys_iomux_west pins */
> +#define PAD_GPIO0_W 0
> +#define PAD_GPIO1_W 1
NAK, read my comments.
Best regards,
Krzysztof
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