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Date: Tue, 20 Feb 2024 10:26:50 +0800
From: Zenghui Yu <yuzenghui@...wei.com>
To: Marc Zyngier <maz@...nel.org>
CC: Naresh Kamboju <naresh.kamboju@...aro.org>, open list
	<linux-kernel@...r.kernel.org>, Linux ARM
	<linux-arm-kernel@...ts.infradead.org>, <lkft-triage@...ts.linaro.org>, Linux
 Regressions <regressions@...ts.linux.dev>, Catalin Marinas
	<catalin.marinas@....com>, Arnd Bergmann <arnd@...db.de>, Dan Carpenter
	<dan.carpenter@...aro.org>, Anders Roxell <anders.roxell@...aro.org>
Subject: Re: next-20240219: arm64: boot failed - gic_of_init

On 2024/2/19 23:27, Marc Zyngier wrote:
> On Mon, 19 Feb 2024 14:46:46 +0000,
> Zenghui Yu <yuzenghui@...wei.com> wrote:
>>
>> On 2024/2/19 19:32, Marc Zyngier wrote:
>>> For what it is worth, I've just tested both defconfig and my own
>>> configuration with both 4k (kvmtool, QEMU+KVM and on SynQuacer) and
>>> 16k (kvmtool), without any obvious problem.
>>
>> I had a quick test on top of next-20240219 with defconfig.  I can
>> reproduce it with QEMU parameter '-cpu max -accel tcg', but things are
>> fine with '-cpu max,lpa2=off -accel tcg'.
>>
>> Bisection shows that the problem happens when we start putting the
>> latest arm64 and kvmarm changes together.  The following hack fixes the
>> problem for me (but I **only** write it for kernel built with defconfig
>> with ARM64_4K_PAGES=y atm).
>>
>> I can investigate it further tomorrow (as it's too late now ;-) ).  Or
>> maybe Marc or Catalin can help fix it with a proper approach.
>>
>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
>> index 4f7662008ede..babdc3f4721b 100644
>> --- a/arch/arm64/kernel/cpufeature.c
>> +++ b/arch/arm64/kernel/cpufeature.c
>> @@ -2798,6 +2798,7 @@ static const struct arm64_cpu_capabilities
>> arm64_features[] = {
>> | 		.sign = FTR_SIGNED,
>> | 		.field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT,
>> | 		.min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT,
>> |+		.max_field_value = BIT(ID_AA64MMFR0_EL1_TGRAN4_WIDTH - 1) - 1,
>> | #else
>> | 		.sign = FTR_UNSIGNED,
>> | 		.field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT,
> 
> I've posted my take on this at [1], which hopefully matches what you
> were aiming at.
> 
> [1] https://lore.kernel.org/all/86bk8c4gyh.wl-maz@kernel.org/

Yup, this looks good to me.

Thanks,
Zenghui

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