| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20240220025343.3093955-1-anshuman.khandual@arm.com> Date: Tue, 20 Feb 2024 08:23:43 +0530 From: Anshuman Khandual <anshuman.khandual@....com> To: linux-arm-kernel@...ts.infradead.org Cc: Anshuman Khandual <anshuman.khandual@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>, linux-kernel@...r.kernel.org Subject: [PATCH V2] arm64/sysreg: Update ID_DFR0_EL1 register fields This updates ID_DFR0_EL1.PerfMon and ID_DFR0_EL1.CopDbg register fields as per the definitions based on DDI0601 2023-12. Cc: Catalin Marinas <catalin.marinas@....com> Cc: Will Deacon <will@...nel.org> Cc: Mark Brown <broonie@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@....com> --- This applies on v6.8-rc5 Changes in V2: - Split ID_DFR0_EL1 changes in this patch and updated PerfMon per Mark Changes in V1: https://lore.kernel.org/all/20240215055159.2440898-1-anshuman.khandual@arm.com/ arch/arm64/tools/sysreg | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index dd693f992832..a9cab2b730a3 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -200,6 +200,7 @@ UnsignedEnum 27:24 PerfMon 0b0110 PMUv3p5 0b0111 PMUv3p7 0b1000 PMUv3p8 + 0b1001 PMUv3p9 0b1111 IMPDEF EndEnum Enum 23:20 MProfDbg @@ -231,6 +232,7 @@ Enum 3:0 CopDbg 0b1000 Debugv8p2 0b1001 Debugv8p4 0b1010 Debugv8p8 + 0b1011 Debugv8p9 EndEnum EndSysreg -- 2.25.1
Powered by blists - more mailing lists