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Message-ID: <mafs034tn8dq1.fsf@kernel.org>
Date: Tue, 20 Feb 2024 14:30:46 +0100
From: Pratyush Yadav <pratyush@...nel.org>
To: Josua Mayer <josua@...id-run.com>
Cc: Pratyush Yadav <pratyush@...nel.org>,  Tudor Ambarus
 <tudor.ambarus@...aro.org>,  Michael Walle <mwalle@...nel.org>,  Miquel
 Raynal <miquel.raynal@...tlin.com>,  Richard Weinberger <richard@....at>,
  Vignesh Raghavendra <vigneshr@...com>,  Rob Herring <robh+dt@...nel.org>,
  Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,  Conor Dooley
 <conor+dt@...nel.org>,  linux-mtd@...ts.infradead.org,  Yazan Shhady
 <yazan.shhady@...id-run.com>,  Rob Herring <robh@...nel.org>,
  devicetree@...r.kernel.org,  linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7] dt-bindings: mtd: spi-nor: add optional interrupts
 property

On Tue, Feb 20 2024, Josua Mayer wrote:

> Am 20.02.24 um 13:19 schrieb Pratyush Yadav:
>> On Mon, Feb 19 2024, Josua Mayer wrote:
>>
>>> Some spi flash memories have an interrupt signal which can be used for
>>> signalling on-chip events such as busy status or ecc errors to the host.
>>>
>>> Add binding for "interrupts" property so that boards wiring this signal
>>> may describe the connection.
>>>
>>> Signed-off-by: Josua Mayer <josua@...id-run.com>
>>> Acked-by: Rob Herring <robh@...nel.org>
>> Acked-by: Pratyush Yadav <pratyush@...nel.org>
>>
>> BTW, I don't see any support in SPI NOR for handling these interrupts.
>> Do you plan to add them in a later patchset?
> No current plans, I have little knowledge how spi-nor works in the kernel.
>> If not, what do you get by
>> describing them?
> Foremost I get to submit a correct device-tree (describes hardware)
> to the kernel, without maintainers getting all over me for introducing
> new dtbs_check errors.
>
> And I really do prefer submitting a complete device-tree so that all
> knowledge I have gained reading private schematics is readily
> available the next time someone works on it.

Fair enough. I guessed as much but thanks for the confirmation!

[...]

-- 
Regards,
Pratyush Yadav

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