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Message-ID: <875xyji7mc.ffs@tglx>
Date: Tue, 20 Feb 2024 14:32:27 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Anup Patel <apatel@...tanamicro.com>, Palmer Dabbelt
<palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Rob
Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Frank Rowand
<frowand.list@...il.com>, Conor Dooley <conor+dt@...nel.org>
Cc: Marc Zyngier <maz@...nel.org>, Björn Töpel
<bjorn@...nel.org>, Atish
Patra <atishp@...shpatra.org>, Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>, Saravana Kannan
<saravanak@...gle.com>, Anup Patel <anup@...infault.org>,
linux-riscv@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, Anup Patel
<apatel@...tanamicro.com>
Subject: Re: [PATCH v13 07/13] irqchip/riscv-imsic: Add device MSI domain
support for platform devices
On Tue, Feb 20 2024 at 11:37, Anup Patel wrote:
> +#ifdef CONFIG_SMP
> +static void imsic_msi_update_msg(struct irq_data *d, struct imsic_vector *vec)
> +{
> + struct msi_msg msg[2] = { [1] = { }, };
That's a weird initializer and why do you need an array here?
struct msi_msg msg = { };
Should be sufficient, no?
> +
> + imsic_irq_compose_vector_msg(vec, msg);
> + irq_data_get_irq_chip(d)->irq_write_msi_msg(d, msg);
> +}
> +static int imsic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> + unsigned int nr_irqs, void *args)
> +{
> + struct imsic_vector *vec;
> +
> + /* Legacy-MSI or multi-MSI not supported yet. */
Coming back to my earlier question:
>> What's legacy MSI in that context?
>
> The legacy-MSI is the MSI support in PCI v2.2 where
> number of MSIs allocated by device were either 1, 2, 4,
> 8, 16, or 32 and the data written is <data_word> + <irqnum>.
You talk about PCI/MSI, where more than one vector is named
multi-MSI. Contrary to the modern v3.0 variant which is PCI/MSI-X.
So this should be "Multi-MSI is not supported yet", no?
> + if (nr_irqs > 1)
> + return -ENOTSUPP;
> +
> + vec = imsic_vector_alloc(virq, cpu_online_mask);
> + if (!vec)
> + return -ENOSPC;
> +
> + irq_domain_set_info(domain, virq, virq,
> + &imsic_irq_base_chip, vec,
> + handle_simple_irq, NULL, NULL);
Please utilize the 100 characters.
> + irq_set_noprobe(virq);
> + irq_set_affinity(virq, cpu_online_mask);
> +
> + return 0;
> +}
Thanks,
tglx
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