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Message-Id: <170843064764.2617406.4906791201590222748.b4-ty@kernel.org>
Date: Tue, 20 Feb 2024 14:04:39 +0000
From: Will Deacon <will@...nel.org>
To: hj96.nam@...sung.com
Cc: catalin.marinas@....com,
	kernel-team@...roid.com,
	Will Deacon <will@...nel.org>,
	linux-kernel@...r.kernel.org,
	linux-cxl@...r.kernel.org,
	wj28.lee@...sung.com,
	jonathan.cameron@...wei.com,
	mark.rutland@....com,
	ks0204.kim@...sung.com,
	Jonathan Cameron <Jonathan.Cameron@...wei.com>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3] perf: CXL: fix CPMU filter value mask length

On Fri, 16 Feb 2024 10:45:22 +0900, hj96.nam@...sung.com wrote:
> From: Hojin Nam <hj96.nam@...sung.com>
> 
> CPMU filter value is described as 4B length in CXL r3.0 8.2.7.2.2.
> However, it is used as 2B length in code and comments.
> 
> 

Applied to arm64 (for-next/fixes), thanks!

[1/1] perf: CXL: fix CPMU filter value mask length
      https://git.kernel.org/arm64/c/802379b8f9e1

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

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