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Message-ID: <00bd50ed-bc7c-482f-b126-321d1ac9228d@quicinc.com>
Date: Wed, 21 Feb 2024 17:10:07 +0530
From: Krishna Kurapati PSSNV <quic_kriskura@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konrad.dybcio@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
"Kishon Vijay
Abraham I" <kishon@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-phy@...ts.infradead.org>, <quic_ppratap@...cinc.com>,
<quic_jackp@...cinc.com>
Subject: Re: [PATCH] phy: qcom-snps: Fixed order of enabling regulators
On 2/21/2024 4:26 PM, Dmitry Baryshkov wrote:
> On Wed, 21 Feb 2024 at 12:32, Krishna Kurapati > <quic_kriskura@...cinc.com> wrote:
[...]
>> ---
>>
>> Downstream kernels on QC targets use this sequence to power up
>> the phy and this has been tested extensively on multiple targets.
>> This change has been tested with upstream kernel on QCM6490-IDP
>> without EUD to ensure there is no loss or breakage of functionality.
>>
>> drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
>> index eb0b0f61d98e..e86d221b7397 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
>> @@ -79,7 +79,7 @@
>> #define LS_FS_OUTPUT_IMPEDANCE_MASK GENMASK(3, 0)
>>
>> static const char * const qcom_snps_hsphy_vreg_names[] = {
>> - "vdda-pll", "vdda33", "vdda18",
>> + "vdda-pll", "vdda18", "vdda33",
>
> NAK.
> The driver uses regulator_bulk_enable, which enables all three
> regulators simultaneously via async calls, thus your change doesn't
> have any effect.
>
Hi Dmitry,
Thanks for this information. I thought it was synchronous but you are
right, I see in code they are async:
async_schedule_domain(regulator_bulk_enable_async,
&consumers[i], &async_domain);
I think separating them out and calling regulator_enable on each one
might work out.
> Also note, that these regulators are frequently shared between
> different consumers. As such, even if you have tight control of
> regulator ordering in the driver, other drivers might enable
> corresponding regulators on their own, breaking the ordering.
>
You are right. Let me check how the phy regulators are allocated in
different femto phy targets.
Thanks for the review.
Regards,
Krishna,
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