[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <9d6c617a-bc3a-47c4-a988-b41b804d8cfe@linaro.org>
Date: Wed, 21 Feb 2024 13:39:01 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, cros-qcom-dts-watchers@...omium.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 09/21] arm64: dts: qcom: sc8280xp: Add PCIe bridge node
On 21.02.2024 04:41, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, add a node to represent the bridge.
>
> While at it, let's remove the bridge properties from board dts as they are
> now redundant.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 -----
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++
> 2 files changed, 40 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index def3976bd5bb..f0a0115e08fa 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -733,14 +733,6 @@ &pcie4 {
> status = "okay";
>
> pcie@0 {
> - device_type = "pci";
> - reg = <0x0 0x0 0x0 0x0 0x0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - ranges;
> -
> - bus-range = <0x01 0xff>;
> -
> wifi@0 {
This doesn't seem right, pleas use a label
Konrad
Powered by blists - more mailing lists