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Message-ID: <CAK9=C2VFksO054kVVHkrBRyZqte8Q4Gpup97VhLBRDCbOyQdqQ@mail.gmail.com>
Date: Wed, 21 Feb 2024 19:05:52 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Frank Rowand <frowand.list@...il.com>,
Conor Dooley <conor+dt@...nel.org>, Marc Zyngier <maz@...nel.org>, Björn Töpel <bjorn@...nel.org>,
Atish Patra <atishp@...shpatra.org>, Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>, Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>, linux-riscv@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v13 02/13] irqchip/sifive-plic: Improve locking safety by
using irqsave/irqrestore
On Tue, Feb 20, 2024 at 3:41 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> On Tue, Feb 20 2024 at 11:37, Anup Patel wrote:
> > Now that PLIC driver is probed as a regular platform driver, the lock
> > dependency validator complains about the safety of handler->enable_lock
> > usage:
> >
> > [ 0.956775] Possible interrupt unsafe locking scenario:
> >
> > [ 0.956998] CPU0 CPU1
> > [ 0.957247] ---- ----
> > [ 0.957439] lock(&handler->enable_lock);
> > [ 0.957607] local_irq_disable();
> > [ 0.957793] lock(&irq_desc_lock_class);
> > [ 0.958021] lock(&handler->enable_lock);
> > [ 0.958246] <Interrupt>
> > [ 0.958342] lock(&irq_desc_lock_class);
> > [ 0.958501]
> > *** DEADLOCK ***
> >
> > To address above, let's use raw_spin_lock_irqsave/unlock_irqrestore()
> > instead of raw_spin_lock/unlock().
>
> s/let's//
Okay, I will update.
Regards,
Anup
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