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Message-ID:
 <SEZPR06MB6959B0A21A1B601644E2836496562@SEZPR06MB6959.apcprd06.prod.outlook.com>
Date: Fri, 23 Feb 2024 02:19:45 +0800
From: Yang Xiwen <forbidden405@...look.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 Yisen Zhuang <yisen.zhuang@...wei.com>, Salil Mehta
 <salil.mehta@...wei.com>, "David S. Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
 Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
 Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org
Subject: Re: [PATCH net-next v4 1/6] dt-bindings: net: hisilicon-femac-mdio:
 convert to YAML

On 2/23/2024 2:14 AM, Krzysztof Kozlowski wrote:
> On 22/02/2024 13:43, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen <forbidden405@...look.com>
>>
>> For some FEMAC cores, MDIO bus is integrated to the MAC controller. So
>> We don't have a dedicated MDIO bus clock.
> Hm, this means you miss compatibles for these different cores.


So you mean adding a new compatible like 
"hisilicon,hisi-femac-mdio-integrated" for these ones without dedicated 
clocks?


>
>> Also due to the PHY reset procedure, it's required to manage all clocks
>> and resets in the MAC controller driver. MAC controller clock can not be
>> shared with MDIO bus node in dts.
>>
>> Mark the clock optional to resolve this problem.
> I don't understand how making clock optional solves this problem. Clock
> is still there. Whether driver handles it, does not affect the binding.
>
> Best regards,
> Krzysztof
>

-- 
Regards,
Yang Xiwen


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