| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Fri, 23 Feb 2024 03:40:15 +0800
From: Yang Xiwen via B4 Relay <devnull+forbidden405.outlook.com@...nel.org>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: David Yang <mmyangfl@...il.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Yang Xiwen <forbidden405@...look.com>
Subject: [PATCH v4 5/7] dt-bindings: clock:
hisilicon,clock-reset-controller: add Hi3798MV200 SoC
From: Yang Xiwen <forbidden405@...look.com>
This SoC is similar to Hi3798CV200.
Signed-off-by: Yang Xiwen <forbidden405@...look.com>
---
Documentation/devicetree/bindings/clock/hisilicon,hisi-crg.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/hisilicon,hisi-crg.yaml b/Documentation/devicetree/bindings/clock/hisilicon,hisi-crg.yaml
index 251156905a7b..a4af12aa3f08 100644
--- a/Documentation/devicetree/bindings/clock/hisilicon,hisi-crg.yaml
+++ b/Documentation/devicetree/bindings/clock/hisilicon,hisi-crg.yaml
@@ -23,6 +23,8 @@ properties:
- hisilicon,hi3798cv200-sysctrl
- hisilicon,hi3516cv300-crg
- hisilicon,hi3516cv300-sysctrl
+ - hisilicon,hi3798mv200-crg
+ - hisilicon,hi3798mv200-sysctrl
- const: syscon
- const: simple-mfd
--
2.43.0
Powered by blists - more mailing lists