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Message-ID:
<SEZPR06MB69595872C9886D9C38C5D8CB96562@SEZPR06MB6959.apcprd06.prod.outlook.com>
Date: Fri, 23 Feb 2024 07:24:24 +0800
From: Yang Xiwen <forbidden405@...look.com>
To: Rob Herring <robh@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, David Yang <mmyangfl@...il.com>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC 3/4] dt-binding: clock: merge all hisilicon clock
bindings to hisilicon,clock-reset-generator
On 2/23/2024 4:14 AM, Rob Herring wrote:
> On Fri, Feb 16, 2024 at 07:37:53PM +0800, Yang Xiwen wrote:
>> We don't need so many separated and duplicated dt-binding files. Merge
>> them all and convert them to YAML.
>>
>> Signed-off-by: Yang Xiwen <forbidden405@...look.com>
>> ---
>> .../devicetree/bindings/clock/hi3660-clock.txt | 47 -------
>> .../devicetree/bindings/clock/hi3670-clock.txt | 43 -------
>> .../devicetree/bindings/clock/hi6220-clock.txt | 52 --------
>> .../devicetree/bindings/clock/hisi-crg.txt | 50 --------
>> .../clock/hisilicon,clock-reset-generator.yaml | 139 +++++++++++++++++++++
>> .../clock/hisilicon,hi3559av100-clock.yaml | 59 ---------
>> 6 files changed, 139 insertions(+), 251 deletions(-)
>
>> diff --git a/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml b/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml
>> new file mode 100644
>> index 000000000000..d37cd892473e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/hisilicon,clock-reset-generator.yaml
>> @@ -0,0 +1,139 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/hisilicon,clock-reset-generator.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Hisilicon SOC Clock and Reset Generator (CRG) module
>> +
>> +maintainers:
>> + - Yang Xiwen <forbidden405@...mail.com>
>> +
>> +description: |
> Don't need '|' if no formatting. Here and elsewhere.
>
>> + Hisilicon SOC clock control module which supports the clocks, resets and
>> + power domains on various SoCs.
>> +
>> +properties:
>> + compatible:
>> + minItems: 1
>> + items:
>> + - enum:
>> + - hisilicon,hi3559av100-clock
>> + - hisilicon,hi3559av100-shub-clock
>> + - hisilicon,hi3660-crgctrl
>> + - hisilicon,hi3660-pctrl
>> + - hisilicon,hi3660-pmuctrl
>> + - hisilicon,hi3660-sctrl
>> + - hisilicon,hi3660-iomcu
>> + - hisilicon,hi3660-stub-clk
>> + - hisilicon,hi3670-crgctrl
>> + - hisilicon,hi3670-pctrl
>> + - hisilicon,hi3670-pmuctrl
>> + - hisilicon,hi3670-sctrl
>> + - hisilicon,hi3670-iomcu
>> + - hisilicon,hi3670-media1-crg
>> + - hisilicon,hi3670-media2-crg
>> + - hisilicon,hi6220-acpu-sctrl
>> + - hisilicon,hi6220-aoctrl
>> + - hisilicon,hi6220-sysctrl
>> + - hisilicon,hi6220-mediactrl
>> + - hisilicon,hi6220-pmctrl
>> + - hisilicon,hi6220-stub-clk
>> + - hisilicon,hi3516cv300-crg
>> + - hisilicon,hi3516cv300-sysctrl
>> + - hisilicon,hi3519-crg
>> + - hisilicon,hi3798cv200-crg
>> + - hisilicon,hi3798cv200-sysctrl
>> + - const: syscon
>> + - const: simple-mfd
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + '#clock-cells':
>> + const: 1
>> +
>> + '#reset-cells':
>> + enum: [1, 2]
>> + description: |
>> + First cell is reset request register offset.
>> + Second cell is bit offset in reset request register.
>> +
>> + '#address-cells':
>> + const: 1
>> +
>> + '#size-cells':
>> + const: 1
>> +
>> + mboxes:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
> Standard property already has a type. You need to define how many
> entries and what each one is if more than 1.
>
>> + description: |
>> + Phandle to the mailbox for sending msg to MCU
>> + (See ../mailbox/hisilicon,hi3660-mailbox.txt for more info)
> Convert or avoid adding new references to txt bindings.
>
>> +
>> + mbox-names:
>> + $ref: /schemas/types.yaml#/definitions/string-array
>> + description: |
>> + Names of the mailboxes.
>> +
>> + hisilicon,hi6220-clk-sram:
>> + $ref: /schemas/types.yaml#/definitions/phandle
>> + description: |
>> + Phandle to the syscon managing the SoC internal sram
>> + the driver needs using the sram to pass parameters for frequency change.
>> +
>> + reset-controller:
>> + type: object
>> + description: |
>> + Reset controller for Hi3798CV200 GMAC module
>> +
>> +required:
>> + - compatible
>> + - '#clock-cells'
>> +
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + not:
>> + contains:
>> + enum:
>> + - hisilicon,hi3798cv200-crg
>> + then:
>> + properties:
>> + reset-controller: false
>> + - oneOf:
>> + - required:
>> + - hisilicon,hi6220-clk-sram
>> + - required:
>> + - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/hi3559av100-clock.h>
>> + soc {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + clock-controller@...10000 {
>> + compatible = "hisilicon,hi3559av100-clock";
>> + #clock-cells = <1>;
>> + #reset-cells = <2>;
>> + reg = <0x0 0x12010000 0x0 0x10000>;
>> + };
>> + };
>> + - |
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/clock/hi3660-clock.h>
>> + soc {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + clock-controller@...35000 {
>> + compatible = "hisilicon,hi3660-crgctrl", "syscon";
>> + reg = <0x0 0xfff35000 0x0 0x1000>;
>> + #clock-cells = <1>;
>> + };
>> + };
Never mind. I've decided to leave them as-is. Now I'm focusing on
hisi-crg.txt only. (We've already at RFC v4, this patch set is outdated)
--
Regards,
Yang Xiwen
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