linux-kernel - [PATCH v9 00/10] Support Andes PMU extension

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Date: Thu, 22 Feb 2024 16:39:36 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
To: <acme@...nel.org>, <adrian.hunter@...el.com>, <ajones@...tanamicro.com>,
        <alexander.shishkin@...ux.intel.com>, <andre.przywara@....com>,
        <anup@...infault.org>, <aou@...s.berkeley.edu>,
        <atishp@...shpatra.org>, <conor+dt@...nel.org>,
        <conor.dooley@...rochip.com>, <conor@...nel.org>,
        <devicetree@...r.kernel.org>, <evan@...osinc.com>,
        <geert+renesas@...der.be>, <guoren@...nel.org>, <heiko@...ech.de>,
        <irogers@...gle.com>, <jernej.skrabec@...il.com>, <jolsa@...nel.org>,
        <jszhang@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-perf-users@...r.kernel.org>,
        <linux-renesas-soc@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-sunxi@...ts.linux.dev>, <locus84@...estech.com>,
        <magnus.damm@...il.com>, <mark.rutland@....com>, <mingo@...hat.com>,
        <n.shubin@...ro.com>, <namhyung@...nel.org>, <palmer@...belt.com>,
        <paul.walmsley@...ive.com>, <peterlin@...estech.com>,
        <peterz@...radead.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
        <rdunlap@...radead.org>, <robh+dt@...nel.org>, <samuel@...lland.org>,
        <sunilvl@...tanamicro.com>, <tglx@...utronix.de>,
        <tim609@...estech.com>, <uwu@...nowy.me>, <wens@...e.org>,
        <will@...nel.org>, <inochiama@...look.com>, <unicorn_wang@...look.com>,
        <wefu@...hat.com>
Subject: [PATCH v9 00/10] Support Andes PMU extension

Hi All,

This patch series introduces the Andes PMU extension, which serves the
same purpose as Sscofpmf and Smcntrpmf. Its non-standard local interrupt
is assigned to bit 18 in the custom S-mode local interrupt enable and
pending registers (slie/slip), while the interrupt cause is (256 + 18).

The series can be found on Andes Technology GitHub:
- https://github.com/andestech/linux/commits/andes-pmu-support-v9

The PMU device tree node used on AX45MP:
- https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md#example-3

Locus Wei-Han Chen (1):
  riscv: andes: Support specifying symbolic firmware and hardware raw
    events

Yu Chien Peter Lin (9):
  riscv: errata: Rename defines for Andes
  irqchip/riscv-intc: Allow large non-standard interrupt number
  irqchip/riscv-intc: Introduce Andes hart-level interrupt controller
  dt-bindings: riscv: Add Andes interrupt controller compatible string
  riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes
    INTC
  perf: RISC-V: Eliminate redundant interrupt enable/disable operations
  perf: RISC-V: Introduce Andes PMU to support perf event sampling
  dt-bindings: riscv: Add Andes PMU extension description
  riscv: dts: renesas: Add Andes PMU extension for r9a07g043f

 .../devicetree/bindings/riscv/cpus.yaml       |   6 +-
 .../devicetree/bindings/riscv/extensions.yaml |   7 +
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |   4 +-
 arch/riscv/errata/andes/errata.c              |  10 +-
 arch/riscv/include/asm/errata_list.h          |  13 +-
 arch/riscv/include/asm/hwcap.h                |   1 +
 arch/riscv/include/asm/vendorid_list.h        |   2 +-
 arch/riscv/kernel/alternative.c               |   2 +-
 arch/riscv/kernel/cpufeature.c                |   1 +
 drivers/irqchip/irq-riscv-intc.c              |  82 +++++++++--
 drivers/perf/Kconfig                          |  14 ++
 drivers/perf/riscv_pmu_sbi.c                  |  37 ++++-
 include/linux/soc/andes/irq.h                 |  18 +++
 .../arch/riscv/andes/ax45/firmware.json       |  68 ++++++++++
 .../arch/riscv/andes/ax45/instructions.json   | 127 ++++++++++++++++++
 .../arch/riscv/andes/ax45/memory.json         |  57 ++++++++
 .../arch/riscv/andes/ax45/microarch.json      |  77 +++++++++++
 tools/perf/pmu-events/arch/riscv/mapfile.csv  |   1 +
 18 files changed, 488 insertions(+), 39 deletions(-)
 create mode 100644 include/linux/soc/andes/irq.h
 create mode 100644 tools/perf/pmu-events/arch/riscv/andes/ax45/firmware.json
 create mode 100644 tools/perf/pmu-events/arch/riscv/andes/ax45/instructions.json
 create mode 100644 tools/perf/pmu-events/arch/riscv/andes/ax45/memory.json
 create mode 100644 tools/perf/pmu-events/arch/riscv/andes/ax45/microarch.json

-- 
2.34.1