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Message-ID: <20240222-multistream-v1-4-1837ed916eeb@ti.com>
Date: Thu, 22 Feb 2024 17:01:20 +0530
From: Jai Luthra <j-luthra@...com>
To: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Mauro Carvalho Chehab
<mchehab@...nel.org>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Hans
Verkuil <hverkuil-cisco@...all.nl>,
Vaishnav Achath <vaishnav.a@...com>,
Maxime Ripard <mripard@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof
Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley
<conor+dt@...nel.org>
CC: <linux-media@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, Vignesh Raghavendra <vigneshr@...com>,
Aradhya
Bhatia <a-bhatia1@...com>, Devarsh Thakkar <devarsht@...com>,
Changhuang
Liang <changhuang.liang@...rfivetech.com>,
Jack Zhu
<jack.zhu@...rfivetech.com>,
Julien Massot <julien.massot@...labora.com>,
Jayshri Pawar <jpawar@...ence.com>, Jai Luthra <j-luthra@...com>
Subject: [PATCH RFC 04/21] dt-bindings: media: ti,j721e-csi2rx-shim:
Support 32 dma chans
The CSI2RX SHIM IP can support a maximum of 32x DMA channels.
These can be used to split incoming "streams" of data on the CSI-RX
port, distinguished by MIPI Virtual Channel (or Data Type), into
different locations in memory (/dev/videoX nodes).
Actual number of DMA channels reserved is different for each SoC
integrating this IP, but a maximum of 32x channels are always available
in this IP's register space, so set minimum as 1 and maximum as 32.
Link: https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Jai Luthra <j-luthra@...com>
---
.../bindings/media/ti,j721e-csi2rx-shim.yaml | 40 ++++++++++++++++++++--
1 file changed, 37 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml b/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml
index f762fdc05e4d..e47dab7b959e 100644
--- a/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml
+++ b/Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml
@@ -20,11 +20,45 @@ properties:
const: ti,j721e-csi2rx-shim
dmas:
- maxItems: 1
+ minItems: 1
+ maxItems: 32
dma-names:
+ minItems: 1
+ maxItems: 32
items:
- const: rx0
+ - const: rx1
+ - const: rx2
+ - const: rx3
+ - const: rx4
+ - const: rx5
+ - const: rx6
+ - const: rx7
+ - const: rx8
+ - const: rx9
+ - const: rx10
+ - const: rx11
+ - const: rx12
+ - const: rx13
+ - const: rx14
+ - const: rx15
+ - const: rx16
+ - const: rx17
+ - const: rx18
+ - const: rx19
+ - const: rx20
+ - const: rx21
+ - const: rx22
+ - const: rx23
+ - const: rx24
+ - const: rx25
+ - const: rx26
+ - const: rx27
+ - const: rx28
+ - const: rx29
+ - const: rx30
+ - const: rx31
reg:
maxItems: 1
@@ -62,8 +96,8 @@ examples:
ti_csi2rx0: ticsi2rx@...0000 {
compatible = "ti,j721e-csi2rx-shim";
- dmas = <&main_udmap 0x4940>;
- dma-names = "rx0";
+ dmas = <&main_udmap 0x4940>, <&main_udmap 0x4941>;
+ dma-names = "rx0", "rx1";
reg = <0x4500000 0x1000>;
power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
--
2.43.0
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