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Message-ID: <871q93eehn.ffs@tglx>
Date: Fri, 23 Feb 2024 10:06:44 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Yu Chien Peter Lin <peterlin@...estech.com>, acme@...nel.org,
 adrian.hunter@...el.com, ajones@...tanamicro.com,
 alexander.shishkin@...ux.intel.com, andre.przywara@....com,
 anup@...infault.org, aou@...s.berkeley.edu, atishp@...shpatra.org,
 conor+dt@...nel.org, conor.dooley@...rochip.com, conor@...nel.org,
 devicetree@...r.kernel.org, evan@...osinc.com, geert+renesas@...der.be,
 guoren@...nel.org, heiko@...ech.de, irogers@...gle.com,
 jernej.skrabec@...il.com, jolsa@...nel.org, jszhang@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
 linux-renesas-soc@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-sunxi@...ts.linux.dev, locus84@...estech.com, magnus.damm@...il.com,
 mark.rutland@....com, mingo@...hat.com, n.shubin@...ro.com,
 namhyung@...nel.org, palmer@...belt.com, paul.walmsley@...ive.com,
 peterlin@...estech.com, peterz@...radead.org,
 prabhakar.mahadev-lad.rj@...renesas.com, rdunlap@...radead.org,
 robh+dt@...nel.org, samuel@...lland.org, sunilvl@...tanamicro.com,
 tim609@...estech.com, uwu@...nowy.me, wens@...e.org, will@...nel.org,
 inochiama@...look.com, unicorn_wang@...look.com, wefu@...hat.com
Cc: Randolph <randolph@...estech.com>
Subject: Re: [PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level
 interrupt controller

On Fri, Feb 23 2024 at 09:54, Thomas Gleixner wrote:
> On Fri, Feb 23 2024 at 09:49, Thomas Gleixner wrote:
>> On Thu, Feb 22 2024 at 22:36, Thomas Gleixner wrote:
>>> Palmer, feel free to take this through the riscv tree. I have no other
>>> changes pending against that driver.
>>
>> Aargh. Spoken too early. This conflicts with Anups AIA series.
>>
>>   https://lore.kernel.org/all/20240222094006.1030709-1-apatel@ventanamicro.com
>>
>> So I rather take the pile through my tree and deal with the conflicts
>> localy than inflicting it on next.
>
>> Palmer?
>
> Nah. I just apply the two intc patches localy and give you a tag to pull
> from so we carry both the same commits. Then I can deal with the
> conflicts on my side trivially.

Here you go:

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-for-riscv-02-23-24

Contains:

  f4cc33e78ba8 ("irqchip/riscv-intc: Introduce Andes hart-level interrupt controller")
  96303bcb401c ("irqchip/riscv-intc: Allow large non-standard interrupt number")

on top of v6.8-rc1

Thanks,

        tglx

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