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Message-ID: <20240226172218.69486-7-quic_c_gdjako@quicinc.com>
Date: Mon, 26 Feb 2024 09:22:17 -0800
From: Georgi Djakov <quic_c_gdjako@...cinc.com>
To: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <will@...nel.org>, <robin.murphy@....com>,
<joro@...tes.org>, <iommu@...ts.linux.dev>
CC: <devicetree@...r.kernel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <robdclark@...il.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <quic_cgoldswo@...cinc.com>,
<quic_sukadev@...cinc.com>, <quic_pdaly@...cinc.com>,
<quic_sudaraja@...cinc.com>, <djakov@...nel.org>
Subject: [PATCH v5 6/7] iommu/arm-smmu-qcom: Use the custom fault handler on more platforms
The TBU support is now available, so let's allow it to be used on other
platforms that have the Qualcomm SMMU-500 implementation with TBUs. This
will allow the context fault handler to query the TBUs when a context
fault occurs.
Signed-off-by: Georgi Djakov <quic_c_gdjako@...cinc.com>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index a8238f75c5d3..929f1d205526 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -412,6 +412,10 @@ static const struct arm_smmu_impl qcom_smmu_500_impl = {
.reset = arm_mmu500_reset,
.write_s2cr = qcom_smmu_write_s2cr,
.tlb_sync = qcom_smmu_tlb_sync,
+#ifdef CONFIG_ARM_SMMU_QCOM_TBU
+ .context_fault = qcom_smmu_context_fault,
+ .context_fault_needs_threaded_irq = true,
+#endif
};
static const struct arm_smmu_impl sdm845_smmu_500_impl = {
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