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Message-ID: <f8e36e04-2318-89e0-f65e-155575d52c5e@hisilicon.com>
Date: Tue, 27 Feb 2024 15:28:01 +0800
From: Junxian Huang <huangjunxian6@...ilicon.com>
To: Jason Gunthorpe <jgg@...pe.ca>
CC: <leon@...nel.org>, <linux-rdma@...r.kernel.org>, <linuxarm@...wei.com>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 for-next 2/2] RDMA/hns: Support userspace configuring
congestion control algorithm with QP granularity
Problems below will be fixed in next version.
Thanks,
Junxian
On 2024/2/26 22:06, Jason Gunthorpe wrote:
> On Thu, Feb 22, 2024 at 03:06:20PM +0800, Junxian Huang wrote:
>>>> +enum hns_roce_congest_type_flags {
>>>> + HNS_ROCE_CREATE_QP_FLAGS_DCQCN = 1 << 0,
>>>> + HNS_ROCE_CREATE_QP_FLAGS_LDCP = 1 << 1,
>>>> + HNS_ROCE_CREATE_QP_FLAGS_HC3 = 1 << 2,
>>>> + HNS_ROCE_CREATE_QP_FLAGS_DIP = 1 << 3,
>>>> +};
>>>
>>> Why are these bit flags if they are exclusive?
>>>
>>
>> Our FW uses bit flags. Although there is no direct relationship between
>> FW and ABI, but from the perspective of readability, bit flags are also
>> used consistently here in ABI.
>
> Don't do that in uapi.
>
>>>> +enum hns_roce_create_qp_comp_mask {
>>>> + HNS_ROCE_CREATE_QP_MASK_CONGEST_TYPE = 1 << 1,
>>>
>>> Why 1<<1 not 1<<0?
>>
>> This is to keep consistent with our internal ABI, there are some
>> features not upstream yet.
>
> Nope, pack them tightly. Don't keep an "internal ABI"
>
>>>> @@ -114,6 +128,9 @@ struct hns_roce_ib_alloc_ucontext_resp {
>>>> __u32 reserved;
>>>> __u32 config;
>>>> __u32 max_inline_data;
>>>> + __u8 reserved0;
>>>> + __u8 congest_type;
>>>
>>> Why this layout?
>>
>> Same as the 1<<1 issue, to keep consistent with our internal ABI.
>
> Same answer
>
> Jason
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