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Message-ID: <Zd2+XwM7hIpycjVO@shell.armlinux.org.uk>
Date: Tue, 27 Feb 2024 10:50:07 +0000
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Maxime Chevallier <maxime.chevallier@...tlin.com>
Cc: Bastien Curutchet <bastien.curutchet@...tlin.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Pavel Machek <pavel@....cz>,
Lee Jones <lee@...nel.org>,
Richard Cochran <richardcochran@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-leds@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
herve.codina@...tlin.com, christophercordahi@...ometrics.ca
Subject: Re: [PATCH v2 3/6] net: phy: DP83640: Add LED handling
On Tue, Feb 27, 2024 at 10:58:06AM +0100, Maxime Chevallier wrote:
> > + val = phy_read(phydev, PHYCR) & ~(LED_CNFG_1 | LED_CNFG_0);
> > + switch (mode) {
> > + case DP83640_LED_MODE_1:
> > + val |= LED_CNFG_0;
> > + break;
> > + case DP83640_LED_MODE_2:
> > + /* Keeping LED_CNFG_1 and LED_CNFG_0 unset */
> > + break;
> > + case DP83640_LED_MODE_3:
> > + val |= LED_CNFG_1;
> > + break;
> > + default:
> > + return -EINVAL;
> > + }
> > + phy_write(phydev, PHYCR, val);
This should also be phy_modify() as well. Any read-modify-write sequence
is open to race conditions if it is open coded because the bus lock will
be dropped after the read and regained on the write.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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