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Message-Id: <20240227-mbly-clk-v8-7-c57fbda7664a@bootlin.com>
Date: Tue, 27 Feb 2024 15:55:28 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: Gregory CLEMENT <gregory.clement@...tlin.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Linus Walleij <linus.walleij@...aro.org>,
Rafał Miłecki <rafal@...ecki.pl>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
linux-mips@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>, linux-gpio@...r.kernel.org,
Théo Lebrun <theo.lebrun@...tlin.com>
Subject: [PATCH v8 07/10] MIPS: mobileye: eyeq5: add OLB syscon node
The OLB ("Other Logic Block") is a syscon region hosting the clock,
reset and pin controllers. It contains registers such as I2C speed mode
that need to be accessible by other nodes.
Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
---
arch/mips/boot/dts/mobileye/eyeq5.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
index 6cc5980e2fa1..e82d2a57f6da 100644
--- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi
+++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
@@ -100,6 +100,14 @@ uart2: serial@...000 {
clock-names = "uartclk", "apb_pclk";
};
+ olb: system-controller@...000 {
+ compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd";
+ reg = <0 0xe00000 0x0 0x400>;
+ ranges = <0x0 0x0 0xe00000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
gic: interrupt-controller@...000 {
compatible = "mti,gic";
reg = <0x0 0x140000 0x0 0x20000>;
--
2.44.0
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