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Message-Id: <20240228190321.580846-3-Frank.Li@nxp.com>
Date: Wed, 28 Feb 2024 14:03:18 -0500
From: Frank Li <Frank.Li@....com>
To: helgaas@...nel.org
Cc: Frank.Li@....com,
bhelgaas@...gle.com,
conor+dt@...nel.org,
conor@...nel.org,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
krzysztof.kozlowski+dt@...aro.org,
kw@...ux.com,
linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org,
lpieralisi@...nel.org,
robh@...nel.org
Subject: [PATCH v5 2/5] dt-bindings: pci: layerscape-pci: Add snps,dw-pcie.yaml reference
Add snps,dw-pcie.yaml reference. Clean up all context that already exist in
snps,dw-pcie.yaml. Update interrupt-names requirement for difference
compatible string.
Signed-off-by: Frank Li <Frank.Li@....com>
---
.../bindings/pci/fsl,layerscape-pcie.yaml | 102 +++++++++++++-----
1 file changed, 77 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
index c37578fde8bb1..b57b627c18e95 100644
--- a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
@@ -11,7 +11,6 @@ maintainers:
description:
This PCIe RC controller is based on the Synopsys DesignWare PCIe IP
- and thus inherits all the common properties defined in snps,dw-pcie.yaml.
This controller derives its clocks from the Reset Configuration Word (RCW)
which is used to describe the PLL settings at the time of chip-reset.
@@ -36,31 +35,18 @@ properties:
- fsl,lx2160a-pcie
reg:
- description: base addresses and lengths of the PCIe controller register blocks.
+ maxItems: 2
+
+ reg-names:
+ maxItems: 2
interrupts:
- description: A list of interrupt outputs of the controller. Must contain an
- entry for each entry in the interrupt-names property.
+ minItems: 1
+ maxItems: 3
interrupt-names:
minItems: 1
maxItems: 3
- description: It could include the following entries.
- items:
- oneOf:
- - description:
- Used for interrupt line which reports AER events when
- non MSI/MSI-X/INTx mode is used.
- const: aer
- - description:
- Used for interrupt line which reports PME events when
- non MSI/MSI-X/INTx mode is used.
- const: pme
- - description:
- Used for SoCs(like ls2080a, lx2160a, ls2080a, ls2088a, ls1088a)
- which has a single interrupt line for miscellaneous controller
- events(could include AER and PME events).
- const: intr
fsl,pcie-scfg:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -69,10 +55,11 @@ properties:
The second entry is the physical PCIe controller index starting from '0'.
This is used to get SCFG PEXN registers
- dma-coherent:
- description: Indicates that the hardware IP block can ensure the coherency
- of the data transferred from/to the IP block. This can avoid the software
- cache flush/invalid actions, and improve the performance significantly
+ dma-coherent: true
+
+ msi-parent: true
+
+ iommu-map: true
big-endian:
$ref: /schemas/types.yaml#/definitions/flag
@@ -88,6 +75,70 @@ required:
- fsl,pcie-scfg
- dma-coherence
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,lx2160a-pcie
+ then:
+ properties:
+ interrupts:
+ maxItems: 3
+ interrupt-names:
+ items:
+ - const: pme
+ - const: aer
+ - const: intr
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,ls1028a-pcie
+ - fsl,ls1046a-pcie
+ - fsl,ls1043a-pcie
+ - fsl,ls1012a-pcie
+ then:
+ properties:
+ interrupts:
+ maxItems: 2
+ interrupt-names:
+ items:
+ - const: pme
+ - const: aer
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,ls2080a-pcie
+ - fsl,ls2085a-pcie
+ - fsl,ls2088a-pcie
+ - fsl,ls1021a-pcie
+ then:
+ properties:
+ interrupts:
+ maxItems: 1
+ interrupt-names:
+ items:
+ - const: intr
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,ls1088a-pcie
+ then:
+ properties:
+ interrupts:
+ maxItems: 1
+ interrupt-names:
+ items:
+ - const: aer
+
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -100,7 +151,7 @@ examples:
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x20 0x00000000 0x0 0x00002000>; /* configuration space */
- reg-names = "regs", "config";
+ reg-names = "dbi", "config";
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
interrupt-names = "aer";
#address-cells = <3>;
@@ -118,6 +169,7 @@ examples:
<0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
+ msi-map = <0 &its 0 1>; /* Fixed-up by bootloader */
};
};
...
--
2.34.1
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