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Date: Wed, 28 Feb 2024 12:08:37 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@...aro.org>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Rob Herring
	<robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Rob Herring
	<robh+dt@...nel.org>,
        Johan Hovold <johan+linaro@...nel.org>,
        Brian Masney
	<bmasney@...hat.com>, Georgi Djakov <djakov@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <vireshk@...nel.org>, <quic_vbadigan@...cinc.com>,
        <quic_skananth@...cinc.com>, <quic_nitegupt@...cinc.com>,
        <quic_parass@...cinc.com>,
        Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Subject: Re: [PATCH v7 3/7] PCI: qcom: Add ICC bandwidth vote for CPU to PCIe
 path



On 2/28/2024 4:52 AM, Bjorn Helgaas wrote:
> On Fri, Feb 23, 2024 at 08:18:00PM +0530, Krishna chaitanya chundru wrote:
>> To access PCIe registers, PCIe BAR space, config space the CPU-PCIe
>> ICC(interconnect consumers) path should be voted otherwise it may
>> lead to NoC(Network on chip) timeout. We are surviving because of
>> other driver vote for this path.
>> As there is less access on this path compared to PCIe to mem path
>> add minimum vote i.e 1KBps bandwidth always.
> 
> Add blank line between paragraphs or wrap into a single paragraph.
> 
> Add space before open paren, e.g., "ICC (interconnect consumers)",
> "NoC (Network on Chip)".
> 
>> In suspend remove the disable this path after register space access
>> is done.
> 
> "... remove the disable this path ..." has too many verbs :)
> Maybe "When suspending, disable this path ..."?
> 
>> +	 * The config space, BAR space and registers goes through cpu-pcie path.
>> +	 * Set peak bandwidth to 1KBps as recommended by HW team for this path all the time.
> 
> Wrap to fit in 80 columns.
> 
>> +	/* Remove cpu path vote after all the register access is done */
> 
> One of the other patches has s/cpu/CPU/ in it.  Please do the same
> here.
> 
> Bjorn
I will update the commit message as suggested in next series.

We have limit up to 100 columns in the driver right, I am ok to change 
to 80 but just checking if I misunderstood something.

- Krishna Chaitanya.

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