linux-kernel - Re: [PATCH v5 0/3] arm64: qcom: sa8775p: add cache coherency support for SA8775P

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7cd328e2-6847-973f-c38b-93d1e64d3771@quicinc.com>
Date: Wed, 28 Feb 2024 18:37:01 +0530
From: Mrinmay Sarkar <quic_msarkar@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        <andersson@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <konrad.dybcio@...aro.org>,
        <manivannan.sadhasivam@...aro.org>, <robh@...nel.org>
CC: <quic_shazhuss@...cinc.com>, <quic_nitegupt@...cinc.com>,
        <quic_ramkri@...cinc.com>, <quic_nayiluri@...cinc.com>,
        <dmitry.baryshkov@...aro.org>, <quic_krichai@...cinc.com>,
        <quic_vbadigan@...cinc.com>, <quic_schintav@...cinc.com>,
        Lorenzo Pieralisi
	<lpieralisi@...nel.org>,
        Krzysztof Wilczyński
	<kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-pci@...r.kernel.org>
Subject: Re: [PATCH v5 0/3] arm64: qcom: sa8775p: add cache coherency support
 for SA8775P


On 2/24/2024 3:49 PM, Krzysztof Kozlowski wrote:
> On 23/02/2024 15:03, Mrinmay Sarkar wrote:
>> Due to some hardware changes, SA8775P has set the NO_SNOOP attribute
>> in its TLP for all the PCIe controllers. NO_SNOOP attribute when set,
>> the requester is indicating that there no cache coherency issues exit
>> for the addressed memory on the host i.e., memory is not cached. But
>> in reality, requester cannot assume this unless there is a complete
>> control/visibility over the addressed memory on the host.
>>
>> And worst case, if the memory is cached on the host, it may lead to
>> memory corruption issues. It should be noted that the caching of memory
>> on the host is not solely dependent on the NO_SNOOP attribute in TLP.
>>
>> So to avoid the corruption, this patch overrides the NO_SNOOP attribute
>> by setting the PCIE_PARF_NO_SNOOP_OVERIDE register. This patch is not
>> needed for other upstream supported platforms since they do not set
>> NO_SNOOP attribute by default.
>>
>> This series is to enable cache snooping logic in both RC and EP driver
>> and add the "dma-coherent" property in dtsi to support cache coherency
>> in SA8775P platform.
> Please confirm that your patchset passes 100% dtbs_check.
>
> Best regards,
> Krzysztof

I have run dtbs_check and it is passing.

Thanks
Mrinmay

>